[U-Boot] [PATCH 2/3] rockchip: back-to-bootrom: replace assembly-implementation with C-code

Dr. Philipp Tomsich philipp.tomsich at theobroma-systems.com
Mon Sep 18 18:49:40 UTC 2017


Andy,

>   This function works fine on ARM64 platform, But I got problems on ARMv7. When trace the code flow with DS5 I found the core switch
> to thumb state when jump to save_boot_params_ret[0], but this code can't only execute in arm state as thumb instruction can't access
> cpsr register. I don't know how to make sure the core in arm state when jump to save_boot_params_ret.
> 
> 
> save_boot_params_ret:
> #ifdef CONFIG_ARMV7_LPAE
> /*
> * check for Hypervisor support
> */
>        mrc     p15, 0, r0, c0, c1, 1           @ read ID_PFR1
>        and     r0, r0, #CPUID_ARM_VIRT_MASK    @ mask virtualization bits
>        cmp     r0, #(1 << CPUID_ARM_VIRT_SHIFT)
>        beq     switch_to_hypervisor
> switch_to_hypervisor_ret:
> #endif
>        /*
>         * disable interrupts (FIQ and IRQ), also set the cpu to SVC32 mode,
>         * except if in HYP mode already
>         */
>        mrs     r0, cpsr
>        and     r1, r0, #0x1f           @ mask mode bits
>        teq     r1, #0x1a               @ test for HYP mode
>        bicne   r0, r0, #0x1f           @ clear all mode bits
>        orrne   r0, r0, #0x13           @ set SVC mode
>        orr     r0, r0, #0xc0           @ disable FIQ and IRQ
>        msr     cpsr,r0

Thanks for tracing this to the missing T32->A32 transition on the return path.
I update the series and things should now work better (I hope):
	https://patchwork.ozlabs.org/user/todo/uboot/?series=3697

I also had to touch the RK3188 support (and don’t have a board to test), so
any testing for the RK3188 change will also be appreciated.

—Philipp.


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