[U-Boot] [U-Boot, v3, 03/14] rockchip: clk: Add rv1108 SARADC clock support

[Philipp Tomsich]

> The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
> SARADC integer divider control register is 10-bits width.
> 
> Signed-off-by: David Wu <david.wu at rock-chips.com>
> Acked-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>
> Reviewed-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>
> ---
> 
> Changes in v3: None
> Changes in v2:
> - Use bitfield_extract
> - Use GENMASK
> 
>  arch/arm/include/asm/arch-rockchip/cru_rv1108.h |  5 ++++
>  drivers/clk/rockchip/clk_rv1108.c               | 33 ++++++++++++++++++++++++-
>  include/dt-bindings/clock/rv1108-cru.h          |  2 ++
>  3 files changed, 39 insertions(+), 1 deletion(-)
> 

Applied to u-boot-rockchip, thanks!