[U-Boot] [PATCH v2 1/2] ls1088ardb: Enable USB command RDB qspi-boot

[Ran Wang]

From: Ashish Kumar <Ashish.Kumar at nxp.com>

Signed-off-by: Ashish Kumar <Ashish.Kumar at nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari at nxp.com>
Signed-off-by: Ran Wang <ran.wang_1 at nxp.com>
---
Change in v2:
	1.Adjust USB nodes position in dts to keep them sorted in
	  unit-address.
	2.Move macro CONFIG_HAS_FSL_XHCI_USB and CONFIG_USB_XHCI_FSL
	  to Kconfig option.
	3.Remove CONFIG_USB_MAX_CONTROLLER_COUNT.

Change in v1:
	Rebased to 
	ba39608 ARM: DRA72x: Add support for detection of DRA71x SR 2.1

 arch/arm/cpu/armv8/fsl-layerscape/Kconfig |  8 ++++++++
 arch/arm/dts/fsl-ls1088a.dtsi             | 14 ++++++++++++++
 board/freescale/ls1088a/ls1088a.c         |  1 -
 configs/ls1088ardb_qspi_defconfig         |  8 ++++++++
 include/linux/usb/xhci-fsl.h              |  2 +-
 5 files changed, 31 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 3518d8601d..3337ff3a00 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -83,6 +83,8 @@ config ARCH_LS1088A
 	select FSL_TZASC_1
 	select ARCH_EARLY_INIT_R
 	select BOARD_EARLY_INIT_F
+	select HAS_FSL_XHCI_USB
+	select USB_XHCI_FSL
 
 config ARCH_LS2080A
 	bool
@@ -346,6 +348,12 @@ config FSL_TZASC_1
 config FSL_TZASC_2
 	bool
 
+config  HAS_FSL_XHCI_USB
+	bool
+
+config  USB_XHCI_FSL
+	bool
+
 endmenu
 
 menu "Layerscape clock tree configuration"
diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index d943a9efa3..64b4fcf12b 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -76,6 +76,20 @@
 		num-cs = <4>;
 	};
 
+	usb0: usb3 at 3100000 {
+		compatible = "fsl,layerscape-dwc3";
+		reg = <0x0 0x3100000 0x0 0x10000>;
+		interrupts = <0 80 0x4>; /* Level high type */
+		dr_mode = "host";
+	};
+
+	usb1: usb3 at 3110000 {
+		compatible = "fsl,layerscape-dwc3";
+		reg = <0x0 0x3110000 0x0 0x10000>;
+		interrupts = <0 81 0x4>; /* Level high type */
+		dr_mode = "host";
+	};
+
 	pcie at 3400000 {
 		compatible = "fsl,ls-pcie", "snps,dw-pcie";
 		reg = <0x00 0x03400000 0x0 0x80000   /* dbi registers */
diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
index 96d9ae7f1d..2156537a27 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -49,7 +49,6 @@ int checkboard(void)
 	static const char *const freq[] = {"100", "125", "156.25",
 					    "100 separate SSCG"};
 	int clock;
-
 #ifdef CONFIG_TARGET_LS1088AQDS
 	printf("Board: LS1088A-QDS, ");
 #else
diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig
index 2d5a134261..3034f506e2 100644
--- a/configs/ls1088ardb_qspi_defconfig
+++ b/configs/ls1088ardb_qspi_defconfig
@@ -31,3 +31,11 @@ CONFIG_FSL_DSPI=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_FSL_LS_PPA=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_CMD_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_STORAGE=y
diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h
index bd54089722..a916afb885 100644
--- a/include/linux/usb/xhci-fsl.h
+++ b/include/linux/usb/xhci-fsl.h
@@ -58,7 +58,7 @@ struct fsl_xhci {
 #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
 #define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0
 #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0
-#elif defined(CONFIG_ARCH_LS2080A)
+#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A)
 #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR
 #define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR
 #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0
-- 
2.14.1