[U-Boot] [PATCH v2 00/19] Add FPGA, SDRAM, SPL loads U-boot & booting to console

[tien.fong.chee at intel.com]

From: Tien Fong Chee <tien.fong.chee at intel.com>

This patchset adding FPGA and SDRAM drivers, enable fpga loadfs to program FPGA
, SPL loading U-boot and booting to U-boot console. This version mainly resolved
comments from Marek in [v1].
This series is working on top of u-boot.git - http://git.denx.de/u-boot.git .

[v1]: https://www.mail-archive.com/u-boot@lists.denx.de/msg261831.html

Tien Fong Chee (19):
  ARM: socfpga: add bindings doc for arria10 fpga manager
  doc: dtbinding: Description on FPGA RBF properties at Arria 10 FPGA
    manager
  dts: Add FPGA bitstream properties to Arria 10 DTS
  arm: socfpga: Add Arria 10 SoCFPGA programming interface
  arm: socfpga: Enhance FPGA program write rbf data with size >= 4 bytes
  dts: Enable fpga-mgr node build for Arria 10 SPL
  fdt: Add compatible strings for Arria 10
  fs: Enable generic filesystems interface support in SPL.
  arm: socfpga: Add drivers for programing FPGA from flash
  arm: socfpga: Rename the gen5 sdram driver to more specific name
  arm: socfpga: Add DRAM bank size initialization function
  arm: socfpga: Add DDR driver for Arria 10
  configs: Add DDR Kconfig support for Arria 10
  arm: socfpga: Enable build for DDR Arria 10
  arm: socfpga: Add support to memory allocation in SPL
  arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10
  arm: socfpga: Adding clock frequency info for U-boot
  arm: socfpga: Adding SoCFPGA info for both SPL and U-boot
  arm: socfpga: Enable SPL loading U-boot to DDR and booting U-boot

 arch/arm/dts/socfpga_arria10.dtsi                  |   4 +
 arch/arm/mach-socfpga/Kconfig                      |   1 +
 arch/arm/mach-socfpga/board.c                      |  16 +
 arch/arm/mach-socfpga/include/mach/boot0.h         |  11 +-
 .../include/mach/fpga_manager_arria10.h            |  27 +
 arch/arm/mach-socfpga/include/mach/sdram.h         | 436 +-----------
 arch/arm/mach-socfpga/include/mach/sdram_arria10.h | 103 ++-
 .../include/mach/{sdram.h => sdram_gen5.h}         |   6 +-
 arch/arm/mach-socfpga/misc_arria10.c               |   5 -
 arch/arm/mach-socfpga/spl.c                        |  61 ++
 cmd/fpga.c                                         |   2 +-
 common/spl/Kconfig                                 |   8 +
 common/spl/spl_mmc.c                               |   2 +-
 configs/socfpga_arria10_defconfig                  |  57 +-
 doc/README.SPL                                     |   1 +
 .../fpga/altera-socfpga-a10-fpga-mgr.txt           |  30 +
 drivers/ddr/altera/Kconfig                         |   2 +-
 drivers/ddr/altera/Makefile                        |   3 +-
 drivers/ddr/altera/sdram_arria10.c                 | 735 +++++++++++++++++++++
 drivers/ddr/altera/{sdram.c => sdram_gen5.c}       |   0
 drivers/fpga/altera.c                              |  39 +-
 drivers/fpga/fpga.c                                |   8 +
 drivers/fpga/socfpga.c                             |  14 +-
 drivers/fpga/socfpga_arria10.c                     | 391 ++++++++++-
 fs/Makefile                                        |   1 +
 include/altera.h                                   |   6 +
 include/configs/socfpga_common.h                   |  28 +-
 include/fdtdec.h                                   |   2 +
 include/fpga.h                                     |   2 +
 include/spl.h                                      |   2 +
 lib/fdtdec.c                                       |   2 +
 31 files changed, 1535 insertions(+), 470 deletions(-)
 copy arch/arm/mach-socfpga/include/mach/{sdram.h => sdram_gen5.h} (99%)
 create mode 100644 doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
 create mode 100644 drivers/ddr/altera/sdram_arria10.c
 rename drivers/ddr/altera/{sdram.c => sdram_gen5.c} (100%)

-- 
2.2.0