[U-Boot] [PATCH v2] sf: bar: Clean BA24 Bank Address Register bit after read/write/erase operation

Jagan Teki jagannadh.teki at gmail.com
Wed Sep 27 08:04:33 UTC 2017


On Mon, Sep 25, 2017 at 4:10 PM, Lukasz Majewski <lukma at denx.de> wrote:
> The content of Bank Address Register (BAR) is volatile. It is cleared
> after power cycle or reset command (RESET F0h).
>
> Some memories (like e.g. s25fl256s) use it to access memory larger than
> 0x1000000 (16 MiB).
>
> The problem shows up when one:
>
> 1. Reads/writes/erases memory > 16 MiB
> 2. Calls "reset" u-boot command (which is not causing BAR to be cleared)
>
> In the above scenario, the SoC ROM sends 0x000000 address to read SPL.
> Unfortunately, the BA24 bit is still set and hence it receives content
> from 0x1000000 (16 MiB) memory address.
> As a result the SoC aborts and we hang. Only power cycle can take the
> SoC out of this state.
>
> How to reproduce/test:
>
> sf probe; sf erase 0x1200000 0x800000; reset
> sf probe; sf erase 0x1200000 0x800000; sf write 0x11000000 0x1200000 0x800000; reset
> sf probe; sf read 0x11000000 0x1200000 0x800000; reset
>
> Signed-off-by: Lukasz Majewski <lukma at denx.de>
>
> ---
> Changes in v2:
>
> - Rename cleanup_bar() to clean_bar()
> - Rewrite in-code comments
> ---
>  drivers/mtd/spi/spi_flash.c | 33 +++++++++++++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
>
> diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
> index 34f6888..5b3c974 100644
> --- a/drivers/mtd/spi/spi_flash.c
> +++ b/drivers/mtd/spi/spi_flash.c
> @@ -113,6 +113,27 @@ static int write_cr(struct spi_flash *flash, u8 wc)
>  #endif
>
>  #ifdef CONFIG_SPI_FLASH_BAR
> +/*
> + * This "cleanup" is necessary in a situation when one was accessing

Update cleanup with clean_bar

Applied to u-boot-spi/master

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.


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