[U-Boot] [PATCH] reset: socfpga: add reset driver for SoCFPGA platform
Marek Vasut
marex at denx.de
Tue Apr 3 14:07:33 UTC 2018
On 04/03/2018 04:04 PM, Dinh Nguyen wrote:
>
>
> On 03/30/2018 02:45 PM, Marek Vasut wrote:
>> On 03/30/2018 06:53 PM, Dinh Nguyen wrote:
>>> Add a DM compatible reset driver for the SoCFPGA platform.
>>>
>>> Signed-off-by: Dinh Nguyen <dinguyen at kernel.org>
>>> ---
>>> drivers/reset/Kconfig | 7 +++
>>> drivers/reset/Makefile | 1 +
>>> drivers/reset/reset-socfpga.c | 111 ++++++++++++++++++++++++++++++++++++++++++
>>> 3 files changed, 119 insertions(+)
>>> create mode 100644 drivers/reset/reset-socfpga.c
>>>
>>> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
>>> index 3964b9e..90b021f 100644
>>> --- a/drivers/reset/Kconfig
>>> +++ b/drivers/reset/Kconfig
>>> @@ -83,4 +83,11 @@ config RESET_ROCKCHIP
>>> though is that some reset signals, like I2C or MISC reset multiple
>>> devices.
>>>
>>> +config RESET_SOCFPGA
>>> + bool "Reset controller driver for SoCFPGA"
>>> + depends on DM_RESET && ARCH_SOCFPGA
>>> + default y
>>> + help
>>> + Support for reset controller on SoCFPGA platform.
>>> +
>>> endmenu
>>> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
>>> index 7d7e080..6f791ee 100644
>>> --- a/drivers/reset/Makefile
>>> +++ b/drivers/reset/Makefile
>>> @@ -13,3 +13,4 @@ obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
>>> obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
>>> obj-$(CONFIG_AST2500_RESET) += ast2500-reset.o
>>> obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o
>>> +obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
>>> diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c
>>> new file mode 100644
>>> index 0000000..af585ec
>>> --- /dev/null
>>> +++ b/drivers/reset/reset-socfpga.c
>>> @@ -0,0 +1,111 @@
>>> +/*
>>> + * Socfpga Reset Controller Driver
>>> + *
>>> + * Copyright 2014 Steffen Trumtrar <s.trumtrar at pengutronix.de>
>>> + *
>>> + * based on
>>> + * Allwinner SoCs Reset Controller driver
>>> + *
>>> + * Copyright 2013 Maxime Ripard
>>> + *
>>> + * Maxime Ripard <maxime.ripard at free-electrons.com>
>>> + *
>>> + * SPDX-License-Identifier: GPL-2.0+
>>> + */
>>> +
>>> +#include <common.h>
>>> +#include <dm.h>
>>> +#include <dm/of_access.h>
>>> +#include <reset-uclass.h>
>>> +#include <linux/bitops.h>
>>> +#include <linux/io.h>
>>> +#include <linux/sizes.h>
>>> +
>>> +#define BANK_INCREMENT 4
>>> +#define NR_BANKS 8
>>> +
>>> +struct socfpga_reset_data {
>>> + void __iomem *membase;
>>> +};
>>> +
>>> +static int socfpga_reset_assert(struct reset_ctl *reset_ctl)
>>> +{
>>> + struct socfpga_reset_data *data = dev_get_priv(reset_ctl->dev);
>>> + int id = reset_ctl->id;
>>> + int reg_width = sizeof(u32);
>>> + int bank = id / (reg_width * BITS_PER_BYTE);
>>> + int offset = id % (reg_width * BITS_PER_BYTE);
>>> + unsigned long flags;
>>> + u32 reg;
>>> +
>>> + reg = readl(data->membase + (bank * BANK_INCREMENT));
>>> + writel(reg | BIT(offset), data->membase + (bank * BANK_INCREMENT));
>>
>> setbits_le32() ?
>>
>
> Ok..
>
>>> + return 0;
>>> +}
>>> +
>>> +static int socfpga_reset_deassert(struct reset_ctl *reset_ctl)
>>> +{
>>> + struct socfpga_reset_data *data = dev_get_priv(reset_ctl->dev);
>>> + int id = reset_ctl->id;
>>> + int reg_width = sizeof(u32);
>>> + int bank = id / (reg_width * BITS_PER_BYTE);
>>> + int offset = id % (reg_width * BITS_PER_BYTE);
>>> + unsigned long flags;
>>> + u32 reg;
>>> +
>>> + reg = readl(data->membase + (bank * BANK_INCREMENT));
>>> + writel(reg & ~BIT(offset), data->membase + (bank * BANK_INCREMENT));
>>
>> clrbits_le32() ?
>>
>
> Ok..
>
>> [...]
>>
>> What I do not see is any user of this code, nor any conversion of
>> existing systems to use this code. Is that expected to happen ? I do not
>> want to see dead code piling up in U-Boot.
>>
>
> I have a patchset that tested this code, the i2c support in SoCFPGA was
> converted to DM, and uses this reset framework. Should I send that along
> with this patch in v2?
Yes please, otherwise this will be just another dead code.
--
Best regards,
Marek Vasut
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