[U-Boot] [PATCH v2] timer: add High Precision Event Timers (HPET) support

Ivan Gorinov ivan.gorinov at intel.com
Wed Apr 4 04:40:16 UTC 2018


On Wed, Apr 04, 2018 at 12:15:24PM +0800, Bin Meng wrote:
> > Doesn't readX/writeX imply a single I/O operation?
> > It may be misleading to define it as two.
> >
> > Assuming MMX or SSE2 to be supported by all x86 processors, 64-bit I/O
> > registers can be accessed as a single operation even in 32-bit code:
> >
> 
> Adding such requirement (MMX or SSE2) to U-Boot is not good. Why do we
> require MMX or SSE2 for readq? Can we use general purpose registers?

In 32-bit code, we can't make a 64-bit memory read operation using only
general purpose registers.

> 
> > static inline u64 readq(void *addr)
> > {
> >         u64 value;
> >
> >         asm volatile ("movq (%0), %%xmm0" : : "r" (addr));
> >         asm volatile ("movq %%xmm0, %0" : "=m" (value));
> >
> >         return value;
> > }
> >
> > I can add these definitions to "asm/io.h".


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