[U-Boot] [PATCH 09/15] mmc: matsushita-common: Handle DMA completion flag differences

[Marek Vasut]

The DMA READ completion flag position differs on Socionext and Renesas
SoCs. It is bit 20 on Socionext SoCs and using bit 17 is a hardware bug
and forbidden. It is bit 17 on Renesas SoCs and bit 20 does not work on
them.

Signed-off-by: Marek Vasut <marek.vasut+renesas at gmail.com>
Cc: Jaehoon Chung <jh80.chung at samsung.com>
Cc: Masahiro Yamada <yamada.masahiro at socionext.com>
---
 drivers/mmc/matsushita-common.c | 10 +++++++++-
 drivers/mmc/matsushita-common.h |  4 ++--
 2 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/matsushita-common.c b/drivers/mmc/matsushita-common.c
index 7e05b1f3d1..11e4553d87 100644
--- a/drivers/mmc/matsushita-common.c
+++ b/drivers/mmc/matsushita-common.c
@@ -339,7 +339,15 @@ static int matsu_sd_dma_xfer(struct udevice *dev, struct mmc_data *data)
 	if (data->flags & MMC_DATA_READ) {
 		buf = data->dest;
 		dir = DMA_FROM_DEVICE;
-		poll_flag = MATSU_SD_DMA_INFO1_END_RD2;
+		/*
+		 * The DMA READ completion flag position differs on Socionext
+		 * and Renesas SoCs. It is bit 20 on Socionext SoCs and using
+		 * bit 17 is a hardware bug and forbidden. It is bit 17 on
+		 * Renesas SoCs and bit 20 does not work on them.
+		 */
+		poll_flag = (priv->caps & MATSU_SD_CAP_RCAR) ?
+			    MATSU_SD_DMA_INFO1_END_RD :
+			    MATSU_SD_DMA_INFO1_END_RD2;
 		tmp |= MATSU_SD_DMA_MODE_DIR_RD;
 	} else {
 		buf = (void *)data->src;
diff --git a/drivers/mmc/matsushita-common.h b/drivers/mmc/matsushita-common.h
index a10ad202c8..8c81bbcc4b 100644
--- a/drivers/mmc/matsushita-common.h
+++ b/drivers/mmc/matsushita-common.h
@@ -96,8 +96,8 @@
 #define   MATSU_SD_DMA_RST_RD		BIT(9)
 #define   MATSU_SD_DMA_RST_WR		BIT(8)
 #define MATSU_SD_DMA_INFO1		0x420
-#define   MATSU_SD_DMA_INFO1_END_RD2	BIT(20)	/* DMA from device is complete*/
-#define   MATSU_SD_DMA_INFO1_END_RD	BIT(17)	/* Don't use!  Hardware bug */
+#define   MATSU_SD_DMA_INFO1_END_RD2	BIT(20)	/* DMA from device is complete (uniphier) */
+#define   MATSU_SD_DMA_INFO1_END_RD	BIT(17)	/* DMA from device is complete (renesas) */
 #define   MATSU_SD_DMA_INFO1_END_WR	BIT(16)	/* DMA to device is complete */
 #define MATSU_SD_DMA_INFO1_MASK		0x424
 #define MATSU_SD_DMA_INFO2		0x428
-- 
2.16.2