[U-Boot] [PATCH v5 06/34] musb: sunxi: Add OTG device clkgate and reset for H3/H5

[Jagan Teki]

Add OTG device clkgate and reset for H3/H5 through driver_data
since the driver is already supporting dt.

Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
---
 drivers/usb/musb-new/sunxi.c | 56 +++++++++++++++++++++++++++++++++++++-------
 1 file changed, 47 insertions(+), 9 deletions(-)

diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index ce40fda64e..e834db1e6a 100644
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -76,9 +76,16 @@
  * From usbc/usbc.c
  ******************************************************************************/
 
+struct sunxi_musb_config {
+	struct musb_hdrc_config *config;
+	u8 rst_bit;
+	u8 clkgate_bit;
+};
+
 struct sunxi_glue {
 	struct musb_host_data mdata;
 	struct sunxi_ccm_reg *ccm;
+	struct sunxi_musb_config *cfg;
 	struct device dev;
 };
 #define to_sunxi_glue(d)	container_of(d, struct sunxi_glue, dev)
@@ -269,10 +276,13 @@ static int sunxi_musb_init(struct musb *musb)
 
 	musb->isr = sunxi_musb_interrupt;
 
-	setbits_le32(&glue->ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
+	setbits_le32(&glue->ccm->ahb_gate0,
+		     BIT(AHB_GATE_OFFSET_USB0) | BIT(glue->cfg->clkgate_bit));
 #ifdef CONFIG_SUNXI_GEN_SUN6I
-	setbits_le32(&glue->ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
+	setbits_le32(&glue->ccm->ahb_reset0_cfg,
+		     BIT(AHB_GATE_OFFSET_USB0) | BIT(glue->cfg->rst_bit));
 #endif
+
 	sunxi_usb_phy_init(0);
 
 	USBC_ConfigFIFO_Base();
@@ -359,15 +369,23 @@ static int musb_usb_probe(struct udevice *dev)
 	if (!base)
 		return -EINVAL;
 
+	glue->cfg = (struct sunxi_musb_config *)dev_get_driver_data(dev);
+	if (!glue->cfg)
+		return -EINVAL;
+
 	glue->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
 	if (IS_ERR(glue->ccm))
 		return PTR_ERR(glue->ccm);
 
+#ifdef CONFIG_MACH_SUNXI_H3_H5
+	glue->rst_bit = BIT(AHB_GATE_OFFSET_OTG_DEVICE);
+	glue->clkgate_bit = BIT(AHB_GATE_OFFSET_OTG_DEVICE);
+#endif
 	priv->desc_before_addr = true;
 
 	pdata.power = 250;
 	pdata.platform_ops = &sunxi_musb_ops;
-	pdata.config = (struct musb_hdrc_config *)dev_get_driver_data(dev);
+	pdata.config = glue->cfg->config;
 
 #ifdef CONFIG_USB_MUSB_HOST
 	pdata.mode = MUSB_HOST;
@@ -397,9 +415,11 @@ static int musb_usb_remove(struct udevice *dev)
 
 	sunxi_usb_phy_exit(0);
 #ifdef CONFIG_SUNXI_GEN_SUN6I
-	clrbits_le32(&glue->ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
+	clrbits_le32(&glue->ccm->ahb_reset0_cfg,
+		     BIT(AHB_GATE_OFFSET_USB0) | BIT(glue->cfg->rst_bit));
 #endif
-	clrbits_le32(&glue->ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
+	clrbits_le32(&glue->ccm->ahb_gate0,
+		     BIT(AHB_GATE_OFFSET_USB0) | BIT(glue->cfg->clkgate_bit));
 
 	free(host->host);
 	host->host = NULL;
@@ -407,11 +427,29 @@ static int musb_usb_remove(struct udevice *dev)
 	return 0;
 }
 
+static const struct sunxi_musb_config sun4i_a10_cfg = {
+	.config = &musb_config,
+};
+
+static const struct sunxi_musb_config sun6i_a31_cfg = {
+	.config = &musb_config,
+};
+
+static const struct sunxi_musb_config sun8i_a33_cfg = {
+	.config = &musb_config,
+};
+
+static const struct sunxi_musb_config sun8i_h3_cfg = {
+	.config = &musb_config_h3,
+	.rst_bit = 23,
+	.clkgate_bit = 23,
+};
+
 static const struct udevice_id sunxi_musb_ids[] = {
-	{ .compatible = "allwinner,sun4i-a10-musb", .data = (ulong)&musb_config },
-	{ .compatible = "allwinner,sun6i-a31-musb", .data = (ulong)&musb_config },
-	{ .compatible = "allwinner,sun8i-a33-musb", .data = (ulong)&musb_config },
-	{ .compatible = "allwinner,sun8i-h3-musb", .data = (ulong)&musb_config_h3 },
+	{ .compatible = "allwinner,sun4i-a10-musb", .data = (ulong)&sun4i_a10_cfg },
+	{ .compatible = "allwinner,sun6i-a31-musb", .data = (ulong)&sun6i_a31_cfg },
+	{ .compatible = "allwinner,sun8i-a33-musb", .data = (ulong)&sun8i_a33_cfg },
+	{ .compatible = "allwinner,sun8i-h3-musb", .data = (ulong)&sun8i_h3_cfg },
 	{ }
 };
 
-- 
2.14.3