[U-Boot] [PATCH] board: sama5d2_ptc_ek: adjust the smc timings of nand
Eugen Hristev
eugen.hristev at microchip.com
Tue Apr 24 07:43:53 UTC 2018
To fix the issue of write the rootfs.ubi, adjust the smc timings
configuration of the nand controller.
Based on original work by Wenyou Yang
Signed-off-by: Eugen Hristev <eugen.hristev at microchip.com>
---
board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
index 4c2e209..39d1b38 100644
--- a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
+++ b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
@@ -34,10 +34,10 @@ static void board_nand_hw_init(void)
writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) |
AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(1),
&smc->cs[3].setup);
- writel(AT91_SMC_PULSE_NWE(2) | AT91_SMC_PULSE_NCS_WR(3) |
+ writel(AT91_SMC_PULSE_NWE(2) | AT91_SMC_PULSE_NCS_WR(4) |
AT91_SMC_PULSE_NRD(2) | AT91_SMC_PULSE_NCS_RD(3),
&smc->cs[3].pulse);
- writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+ writel(AT91_SMC_CYCLE_NWE(6) | AT91_SMC_CYCLE_NRD(5),
&smc->cs[3].cycle);
writel(AT91_SMC_TIMINGS_TCLR(2) | AT91_SMC_TIMINGS_TADL(7) |
AT91_SMC_TIMINGS_TAR(2) | AT91_SMC_TIMINGS_TRR(3) |
--
2.7.4
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