[U-Boot] [RFC PATCH 2/5] arm: v7R: Add initial support

[Lokesh Vutla]

On Tuesday 24 April 2018 06:35 PM, Alexander Graf wrote:
> On 04/24/2018 02:54 PM, Lokesh Vutla wrote:
>> From: Michal Simek <michal.simek at xilinx.com>
>>
>> The Cortex-R* processors are a mid-range CPUs for use in deeply-embedded,
>> real-time systems. It implements the ARMv7-R architecture, and includes
>> Thumb-2 technology for optimum code density and processing throughput.
>>
>> Except for MPU(Memory Protection Unit) and few CP15 registers, most of
>> the
>> features are compatible with v7 architecture. So,reuse the same armv7
>> folder and introduce a new config CPU_V7R in order to differentiate
>> from v7 based platforms.
>>
>> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
>> Signed-off-by: Lokesh Vutla <lokeshvutla at ti.com>
>> ---
>>   arch/arm/Kconfig           | 7 +++++++
>>   arch/arm/Makefile          | 2 ++
>>   arch/arm/cpu/armv7/start.S | 2 ++
>>   3 files changed, 11 insertions(+)
>>
>> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
>> index 7212fc5afa..de36ab6701 100644
>> --- a/arch/arm/Kconfig
>> +++ b/arch/arm/Kconfig
>> @@ -192,6 +192,11 @@ config CPU_V7M
>>       select THUMB2_KERNEL
>>       select SYS_CACHE_SHIFT_5
>>   +config CPU_V7R
>> +    bool
>> +        select HAS_THUMB2
> 
> spaces vs tabs?
will fix it in next version.

> 
>> +    select SYS_CACHE_SHIFT_6
>> +
>>   config CPU_PXA
>>       bool
>>       select SYS_CACHE_SHIFT_5
>> @@ -208,6 +213,7 @@ config SYS_CPU
>>       default "arm1136" if CPU_ARM1136
>>       default "arm1176" if CPU_ARM1176
>>       default "armv7" if CPU_V7
>> +        default "armv7" if CPU_V7R
> 
> same here

will fix.

> 
>>       default "armv7m" if CPU_V7M
>>       default "pxa" if CPU_PXA
>>       default "sa1100" if CPU_SA1100
>> @@ -223,6 +229,7 @@ config SYS_ARM_ARCH
>>       default 6 if CPU_ARM1176
>>       default 7 if CPU_V7
>>       default 7 if CPU_V7M
>> +    default 7 if CPU_V7R
>>       default 5 if CPU_PXA
>>       default 4 if CPU_SA1100
>>       default 8 if ARM64
>> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
>> index 4fa8b38397..f4bc1f250d 100644
>> --- a/arch/arm/Makefile
>> +++ b/arch/arm/Makefile
>> @@ -18,6 +18,7 @@ arch-$(CONFIG_CPU_ARM1136)    =-march=armv5
>>   arch-$(CONFIG_CPU_ARM1176)    =-march=armv5t
>>   arch-$(CONFIG_CPU_V7)        =$(call cc-option, -march=armv7-a, \
>>                    $(call cc-option, -march=armv7, -march=armv5))
>> +arch-$(CONFIG_CPU_V7R)        =-march=armv7-r
>>   arch-$(CONFIG_ARM64)        =-march=armv8-a
>>     # On Tegra systems we must build SPL for the armv4 core on the device
>> @@ -41,6 +42,7 @@ tune-$(CONFIG_CPU_PXA)        =-mcpu=xscale
>>   tune-$(CONFIG_CPU_ARM1136)    =
>>   tune-$(CONFIG_CPU_ARM1176)    =
>>   tune-$(CONFIG_CPU_V7)        =
>> +tune-$(CONFIG_CPU_V7R)        =
>>   tune-$(CONFIG_ARM64)        =
>>     # Evaluate tune cc-option calls now
>> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
>> index 937f7051fe..97cd830dc5 100644
>> --- a/arch/arm/cpu/armv7/start.S
>> +++ b/arch/arm/cpu/armv7/start.S
>> @@ -82,7 +82,9 @@ switch_to_hypervisor_ret:
>>         /* the mask ROM code should have PLL and others stable */
>>   #ifndef CONFIG_SKIP_LOWLEVEL_INIT
>> +#ifdef CONFIG_CPU_V7
> 
> Shouldn't this be V7A now?

As Tom suggested, ill not update it for now.

Thanks and regards,
Lokesh

> 
> 
> Alex
> 
>>       bl    cpu_init_cp15
>> +#endif
>>   #ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
>>       bl    cpu_init_crit
>>   #endif
> 
>