[U-Boot] [PATCH 0/5] Get socfpga gen5 SPL working again.

[Simon Goldschmidt]

Socfpga gen5 SPL has been broken since moving to DM serial with
v2018.07.. Also, U-Boot console output has been broken since then.
This series fixes this and makes some related small improvements.

Simon Goldschmidt (5):
  arm: socfpga: fix SPL on gen5 after moving to DM serial
  arm: socfpga: fix device trees to work with DM serial
  arm: socfpga: cyclone5: handle debug uart
  board_init.c: fix simple malloc by storing malloc_limit
  malloc_simple: calloc: don't call memset if malloc failed

 arch/arm/dts/socfpga.dtsi                      |  1 +
 arch/arm/dts/socfpga_arria5_socdk.dts          |  1 +
 arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts     |  1 +
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts |  1 +
 arch/arm/dts/socfpga_cyclone5_de10_nano.dts    |  1 +
 arch/arm/dts/socfpga_cyclone5_de1_soc.dts      |  1 +
 arch/arm/dts/socfpga_cyclone5_is1.dts          |  1 +
 arch/arm/dts/socfpga_cyclone5_socdk.dts        |  1 +
 arch/arm/dts/socfpga_cyclone5_sockit.dts       |  1 +
 arch/arm/dts/socfpga_cyclone5_socrates.dts     |  6 ++++++
 arch/arm/dts/socfpga_cyclone5_sr1500.dts       |  1 +
 arch/arm/dts/socfpga_cyclone5_vining_fpga.dts  |  1 +
 arch/arm/mach-socfpga/reset_manager_gen5.c     |  5 +++--
 arch/arm/mach-socfpga/spl_gen5.c               | 16 +++++++++++++---
 common/init/board_init.c                       |  1 +
 common/malloc_simple.c                         |  3 ++-
 16 files changed, 36 insertions(+), 6 deletions(-)

-- 
2.17.1