Stefan Roese <sr at denx.de> schrieb am Mo., 6. Aug. 2018, 16:34:
> Some SPI NOR chips only support 4-byte mode addressing. Here the default
> 3-byte mode does not work and leads to incorrect accesses. Setting this
> option enables the use of such SPI NOR chips, that only support this
> 4-byte mode.
>
I think it would make more sense to enable 4-byte mode or 4-byte opcodes on
all chips with more than 16 mbyte rather than having to select at compile
time.
Simon
> This was noticed on the LinkIt Smart 7688 modul, which is equipped with
> an Macronix MX25L25635F device. But this device does *NOT* support
> switching to 3-byte mode via the EX4B command.
>
> Signed-off-by: Stefan Roese <sr at denx.de>
> Cc: Jagan Teki <jagan at openedev.com>
> ---
> drivers/mtd/spi/Kconfig | 9 +++++++++
> drivers/mtd/spi/sf_internal.h | 5 +++++
> drivers/mtd/spi/spi_flash.c | 7 +++++++
> 3 files changed, 21 insertions(+)
>
> diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
> index 4484cf8195..5738cd66e8 100644
> --- a/drivers/mtd/spi/Kconfig
> +++ b/drivers/mtd/spi/Kconfig
> @@ -49,6 +49,15 @@ config SF_DUAL_FLASH
> Enable this option to support two flash memories connected to a
> single
> controller. Currently Xilinx Zynq qspi supports this.
>
> +config SPI_FLASH_4BYTE_MODE_ONLY
> + bool "SPI 4-byte mode only supported"
> + depends on SPI_FLASH
> + help
> + Some SPI NOR chips only support 4-byte mode addressing. Here
> + the default 3-byte mode does not work and leads to incorrect
> + accesses. Setting this option enables the use of such SPI
> + NOR chips, that only support this 4-byte mode.
> +
> if SPI_FLASH
>
> config SPI_FLASH_ATMEL
> diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
> index 4f63cacc64..78be6e442f 100644
> --- a/drivers/mtd/spi/sf_internal.h
> +++ b/drivers/mtd/spi/sf_internal.h
> @@ -26,7 +26,12 @@ enum spi_nor_option_flags {
> };
>
> #define SPI_FLASH_3B_ADDR_LEN 3
> +#define SPI_FLASH_4B_ADDR_LEN 4
> +#ifdef CONFIG_SPI_FLASH_4BYTE_MODE_ONLY
> +#define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_4B_ADDR_LEN)
> +#else
> #define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN)
> +#endif
> #define SPI_FLASH_16MB_BOUN 0x1000000
>
> /* CFI Manufacture ID's */
> diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
> index c159124259..3b26d8ca88 100644
> --- a/drivers/mtd/spi/spi_flash.c
> +++ b/drivers/mtd/spi/spi_flash.c
> @@ -23,9 +23,16 @@
> static void spi_flash_addr(u32 addr, u8 *cmd)
> {
> /* cmd[0] is actual command */
> +#ifdef CONFIG_SPI_FLASH_4BYTE_MODE_ONLY
> + cmd[1] = addr >> 24;
> + cmd[2] = addr >> 16;
> + cmd[3] = addr >> 8;
> + cmd[4] = addr >> 0;
> +#else
> cmd[1] = addr >> 16;
> cmd[2] = addr >> 8;
> cmd[3] = addr >> 0;
> +#endif
> }
>
> static int read_sr(struct spi_flash *flash, u8 *rs)
> --
> 2.18.0
>
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