[U-Boot] [PATCH v7 0/8] NXP LS1046A SMMU enabling patches

[laurentiu.tudor at nxp.com]

From: Laurentiu Tudor <laurentiu.tudor at nxp.com>

This patch series adds the required devices setup and device tree
fixups for SMMU enablement on NXP LS1046A chips. The approach taken
tries to mimic the implementation of PAMU LIODN setup on booke powerpc.

First 4 patches contain some fixes and add some missing bits & pieces.
Last 4 patches add the actual infrastructure for ICID setup, qman
portals, fman ICID and SEC configuration.

Changes in v7:
 - fix this build breakage introduced by patch [6/8] on booke ppc
   appearing with certain tool chain versions:
	"drivers/misc/fsl_portals.c: In function 'fdt_fixup_qportals':
	drivers/misc/fsl_portals.c:256:3: error: 'for' loop initial
	declarations are only allowed in C99 or C11 mode"
 - fixed linker error on LS1012A targets:
	"arch/arm/cpu/armv8/built-in.o: In function
	`fsl_lsch2_early_init_f':
	arch/arm/cpu/armv8/fsl-layerscape/soc.c:691:
	undefined reference to `set_icids'"

Changes in v6:
 - distinct ICIDs for all SEC blocks (Horia, Bharat)

Changes in v5:
 - use distinct ICID for SEC JRs (Horia, Bharat)
 - moved an #include in the file it's used (Horia)
 - fix broken compilation of multiple targets due to removal of SEC
   related config (Horia)
 - add a missing #include in qds board file
 - drop few uses of CONFIG_SYS_FMAN_V3 and consistently use
   CONFIG_SYS_DPAA_FMAN everywhere

Changes in v4:
 - added missing SEC ICID config
 - updated macro params to match arguments
 - supplemental comments

Changes in v3:
 - cleaner QMAN_BAR setup
 - moved SoC specific bits from generic ICID arch setup to board code

Changes in v2:
 - drop CONFIG_SYS_ prefix from newly introduced defines in patch [1/8]

Laurentiu Tudor (8):
  armv8: fsl-layerscape: add missing register blocks base address
    defines
  armv8: ls1046a: advertise QMan v3 in configuration
  misc: fsl_portals: setup QMAN_BAR{E} also on ARM platforms
  armv8: fsl-layerscape: add missing debug stream ID
  armv8: ls1046a: initial icid setup support
  armv8: ls1046a: add icid setup for qman portals
  armv8: ls1046a: setup fman ports ICIDs and device tree
  armv8: ls1046a: setup SEC ICIDs and fix up device tree

 arch/arm/cpu/armv8/fsl-layerscape/Makefile    |   1 +
 arch/arm/cpu/armv8/fsl-layerscape/icid.c      | 192 ++++++++++++++++++
 .../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c |  89 ++++++++
 arch/arm/cpu/armv8/fsl-layerscape/soc.c       |   5 +
 .../include/asm/arch-fsl-layerscape/config.h  |   1 +
 .../asm/arch-fsl-layerscape/fsl_icid.h        | 115 +++++++++++
 .../asm/arch-fsl-layerscape/fsl_portals.h     |  24 +++
 .../asm/arch-fsl-layerscape/immap_lsch2.h     |  15 +-
 .../asm/arch-fsl-layerscape/stream_id_lsch2.h |   1 +
 board/freescale/ls1046aqds/ls1046aqds.c       |   3 +
 board/freescale/ls1046ardb/ls1046ardb.c       |   3 +
 drivers/misc/fsl_portals.c                    |  44 +++-
 12 files changed, 482 insertions(+), 11 deletions(-)
 create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/icid.c
 create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
 create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
 create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h

-- 
2.17.1