[U-Boot] [PATCH 0/6] Get socfpga gen5 SPL working again.

[Simon Goldschmidt]

Socfpga gen5 SPL has been broken since moving to DM serial with
v2018.07. Also, U-Boot console output has been broken since then.
This series fixes this and makes some related small improvements.

Changes in v2:
- Improved comment on patch 1
- Removing gd->malloc_base assignment at the end of board_init_f()
  moved to an extra patch
- don't change printf() to debug() in reset_manager_gen5.c
  socfpga_bridges_reset() (instead make debug uart handle this)
- make ns16550 debug uart handle putc being called before init
- removed the assignment of gd->malloc_limit from board_init()


Simon Goldschmidt (6):
  arm: socfpga: fix SPL on gen5 after moving to DM serial
  arm: socfpga: fix device trees to work with DM serial
  arm: socfpga: spl_gen5: clean up malloc_base assignment
  arm: socfpga: cyclone5: handle debug uart
  serial: ns16550: fix debug uart putc called before init
  malloc_simple: calloc: don't call memset if malloc failed

 arch/arm/dts/socfpga.dtsi                      |  1 +
 arch/arm/dts/socfpga_arria5_socdk.dts          |  1 +
 arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts     |  1 +
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts |  1 +
 arch/arm/dts/socfpga_cyclone5_de10_nano.dts    |  1 +
 arch/arm/dts/socfpga_cyclone5_de1_soc.dts      |  1 +
 arch/arm/dts/socfpga_cyclone5_is1.dts          |  1 +
 arch/arm/dts/socfpga_cyclone5_socdk.dts        |  1 +
 arch/arm/dts/socfpga_cyclone5_sockit.dts       |  1 +
 arch/arm/dts/socfpga_cyclone5_socrates.dts     |  6 ++++++
 arch/arm/dts/socfpga_cyclone5_sr1500.dts       |  1 +
 arch/arm/dts/socfpga_cyclone5_vining_fpga.dts  |  1 +
 arch/arm/mach-socfpga/spl_gen5.c               | 16 +++++++++++++---
 common/malloc_simple.c                         |  3 ++-
 drivers/serial/ns16550.c                       | 18 ++++++++++++++++--
 15 files changed, 48 insertions(+), 6 deletions(-)

-- 
2.17.1