[U-Boot] [PATCH 3/5 v2] mips: Add LinkIt Smart 7688 support

Stefan Roese sr at denx.de
Wed Aug 15 14:35:31 UTC 2018


On 15.08.2018 16:30, Daniel Schwierzeck wrote:
> 
> 
> On 10.08.2018 09:48, Stefan Roese wrote:
>> The LinkIt Smart 7688 modules have a MT7688 SoC with 128 MiB of RAM
>> and 32 MiB of flash (SPI NOR).
>>
>> The mt7628a.dtsi file is imported from Linux v4.17.
>>
>> This patch also includes 2 targets. One is the target that can be
>> programmed into the SPI NOR flash and a 2nd target "xxx-ram" is
>> added to support loading and booting via an already running U-Boot
>> version. This allows easy development and testing without the
>> need to flash the image each time.
>>
>> Signed-off-by: Stefan Roese <sr at denx.de>
>> Cc: Daniel Schwierzeck <daniel.schwierzeck at gmail.com>
>> ---
>> v2:
>> - Kconfig entries added with this patch now
>>
>>   arch/mips/dts/linkit-smart-7688.dts       |  46 ++++++++
>>   arch/mips/dts/mt7628a.dtsi                | 135 ++++++++++++++++++++++
>>   arch/mips/mach-mt7620/Kconfig             |  13 +++
>>   board/seeed/linkit-smart-7688/Kconfig     |  12 ++
>>   board/seeed/linkit-smart-7688/MAINTAINERS |   8 ++
>>   board/seeed/linkit-smart-7688/Makefile    |   3 +
>>   board/seeed/linkit-smart-7688/board.c     |  22 ++++
>>   configs/linkit-smart-7688-ram_defconfig   |  58 ++++++++++
>>   configs/linkit-smart-7688_defconfig       |  62 ++++++++++
>>   include/configs/linkit-smart-7688.h       |  52 +++++++++
>>   10 files changed, 411 insertions(+)
>>   create mode 100644 arch/mips/dts/linkit-smart-7688.dts
>>   create mode 100644 arch/mips/dts/mt7628a.dtsi
>>   create mode 100644 board/seeed/linkit-smart-7688/Kconfig
>>   create mode 100644 board/seeed/linkit-smart-7688/MAINTAINERS
>>   create mode 100644 board/seeed/linkit-smart-7688/Makefile
>>   create mode 100644 board/seeed/linkit-smart-7688/board.c
>>   create mode 100644 configs/linkit-smart-7688-ram_defconfig
>>   create mode 100644 configs/linkit-smart-7688_defconfig
>>   create mode 100644 include/configs/linkit-smart-7688.h
>>
>> diff --git a/arch/mips/dts/linkit-smart-7688.dts b/arch/mips/dts/linkit-smart-7688.dts
>> new file mode 100644
>> index 0000000000..df4bf907c6
>> --- /dev/null
>> +++ b/arch/mips/dts/linkit-smart-7688.dts
>> @@ -0,0 +1,46 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Copyright (C) 2018 Stefan Roese <sr at denx.de>
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "mt7628a.dtsi"
>> +
>> +/ {
>> +	compatible = "seeed,linkit-smart-7688", "ralink,mt7628a-soc";
>> +	model = "LinkIt-Smart-7688";
>> +
>> +	aliases {
>> +		serial0 = &uart2;
>> +		spi0 = &spi0;
>> +	};
>> +
>> +	memory at 0 {
>> +		device_type = "memory";
>> +		reg = <0x0 0x08000000>;
>> +	};
>> +
>> +	chosen {
>> +		bootargs = "console=ttyS0,57600";
>> +		stdout-path = &uart2;
>> +	};
>> +};
>> +
>> +&uart2 {
>> +	status = "okay";
>> +	clock-frequency = <40000000>;
>> +};
>> +
>> +&spi0 {
>> +	status = "okay";
>> +	num-cs = <2>;
>> +
>> +	spi-flash at 0 {
>> +		#address-cells = <1>;
>> +		#size-cells = <1>;
>> +		compatible = "spi-flash", "jedec,spi-nor";
>> +		spi-max-frequency = <25000000>;
>> +		reg = <0>;
>> +	};
>> +};
>> diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
>> new file mode 100644
>> index 0000000000..d00f528e1f
>> --- /dev/null
>> +++ b/arch/mips/dts/mt7628a.dtsi
>> @@ -0,0 +1,135 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +
>> +/ {
>> +	#address-cells = <1>;
>> +	#size-cells = <1>;
>> +	compatible = "ralink,mt7628a-soc";
>> +
>> +	cpus {
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +
>> +		cpu at 0 {
>> +			compatible = "mti,mips24KEc";
>> +			device_type = "cpu";
>> +			reg = <0>;
>> +		};
>> +	};
>> +
>> +	resetc: reset-controller {
>> +		compatible = "ralink,rt2880-reset";
>> +		#reset-cells = <1>;
>> +	};
>> +
>> +	cpuintc: interrupt-controller {
>> +		#address-cells = <0>;
>> +		#interrupt-cells = <1>;
>> +		interrupt-controller;
>> +		compatible = "mti,cpu-interrupt-controller";
>> +	};
>> +
>> +	palmbus at 10000000 {
>> +		compatible = "palmbus", "simple-bus";
>> +		reg = <0x10000000 0x200000>;
>> +		ranges = <0x0 0x10000000 0x1FFFFF>;
>> +
>> +		#address-cells = <1>;
>> +		#size-cells = <1>;
>> +
>> +		sysc: system-controller at 0 {
>> +			compatible = "ralink,mt7620a-sysc", "syscon";
>> +			reg = <0x0 0x100>;
>> +		};
>> +
>> +		intc: interrupt-controller at 200 {
>> +			compatible = "ralink,rt2880-intc";
>> +			reg = <0x200 0x100>;
>> +
>> +			interrupt-controller;
>> +			#interrupt-cells = <1>;
>> +
>> +			resets = <&resetc 9>;
>> +			reset-names = "intc";
>> +
>> +			interrupt-parent = <&cpuintc>;
>> +			interrupts = <2>;
>> +
>> +			ralink,intc-registers = <0x9c 0xa0
>> +						 0x6c 0xa4
>> +						 0x80 0x78>;
>> +		};
>> +
>> +		memory-controller at 300 {
>> +			compatible = "ralink,mt7620a-memc";
>> +			reg = <0x300 0x100>;
>> +		};
>> +
>> +		spi0: spi at b00 {
>> +			compatible = "ralink,mt7621-spi";
>> +			reg = <0xb00 0x40>;
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +		};
>> +
>> +		uart0: uartlite at c00 {
>> +			compatible = "ns16550a";
>> +			reg = <0xc00 0x100>;
>> +
>> +			resets = <&resetc 12>;
>> +			reset-names = "uart0";
>> +
>> +			interrupt-parent = <&intc>;
>> +			interrupts = <20>;
>> +
>> +			reg-shift = <2>;
>> +		};
>> +
>> +		uart1: uart1 at d00 {
>> +			compatible = "ns16550a";
>> +			reg = <0xd00 0x100>;
>> +
>> +			resets = <&resetc 19>;
>> +			reset-names = "uart1";
>> +
>> +			interrupt-parent = <&intc>;
>> +			interrupts = <21>;
>> +
>> +			reg-shift = <2>;
>> +		};
>> +
>> +		uart2: uart2 at e00 {
>> +			compatible = "ns16550a";
>> +			reg = <0xe00 0x100>;
>> +
>> +			resets = <&resetc 20>;
>> +			reset-names = "uart2";
>> +
>> +			interrupt-parent = <&intc>;
>> +			interrupts = <22>;
>> +
>> +			reg-shift = <2>;
>> +		};
>> +	};
>> +
>> +	usb_phy: usb-phy at 10120000 {
>> +		compatible = "mediatek,mt7628-usbphy";
>> +		reg = <0x10120000 0x1000>;
>> +
>> +		#phy-cells = <0>;
>> +
>> +		ralink,sysctl = <&sysc>;
>> +		resets = <&resetc 22 &resetc 25>;
>> +		reset-names = "host", "device";
>> +	};
>> +
>> +	ehci at 101c0000 {
>> +		compatible = "generic-ehci";
>> +		reg = <0x101c0000 0x1000>;
>> +
>> +		phys = <&usb_phy>;
>> +		phy-names = "usb";
>> +
>> +		interrupt-parent = <&intc>;
>> +		interrupts = <18>;
>> +	};
>> +};
>> diff --git a/arch/mips/mach-mt7620/Kconfig b/arch/mips/mach-mt7620/Kconfig
>> index 396fbd0141..ef1211d172 100644
>> --- a/arch/mips/mach-mt7620/Kconfig
>> +++ b/arch/mips/mach-mt7620/Kconfig
>> @@ -21,6 +21,17 @@ endchoice
>>   choice
>>   	prompt "Board select"
>>   
>> +config BOARD_LINKIT_SMART_7688
>> +	bool "LinkIt Smart 7688"
>> +	depends on SOC_MT7620
>> +	select SUPPORTS_BOOT_RAM
>> +	help
>> +	  Seeed LinkIt Smart 7688 boards have a MT7688 SoC with 128 MiB of RAM
>> +	  and 32 MiB of flash (SPI).
>> +	  Between its different peripherals there's an integrated switch with 4
>> +	  ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and
>> +	  a MT7688 (PCIe).
>> +
>>   endchoice
>>   
>>   choice
>> @@ -110,4 +121,6 @@ endchoice
>>   config SUPPORTS_BOOT_RAM
>>   	bool
>>   
>> +source "board/seeed/linkit-smart-7688/Kconfig"
>> +
>>   endmenu
>> diff --git a/board/seeed/linkit-smart-7688/Kconfig b/board/seeed/linkit-smart-7688/Kconfig
>> new file mode 100644
>> index 0000000000..a9d63285c3
>> --- /dev/null
>> +++ b/board/seeed/linkit-smart-7688/Kconfig
>> @@ -0,0 +1,12 @@
>> +if BOARD_LINKIT_SMART_7688
>> +
>> +config SYS_BOARD
>> +	default "linkit-smart-7688"
>> +
>> +config SYS_VENDOR
>> +	default "seeed"
>> +
>> +config SYS_CONFIG_NAME
>> +	default "linkit-smart-7688"
>> +
>> +endif
>> diff --git a/board/seeed/linkit-smart-7688/MAINTAINERS b/board/seeed/linkit-smart-7688/MAINTAINERS
>> new file mode 100644
>> index 0000000000..c3bbad4231
>> --- /dev/null
>> +++ b/board/seeed/linkit-smart-7688/MAINTAINERS
>> @@ -0,0 +1,8 @@
>> +LINKIT_SMART_7688 BOARD
>> +M:	Stefan Roese <sr at denx.de>
>> +S:	Maintained
>> +F:	board/seeed/linkit-smart-7688
>> +F:	include/configs/linkit-smart-7688.h
>> +F:	configs/linkit-smart-7688_defconfig
>> +F:	configs/linkit-smart-7688_ram_defconfig
>> +F:	arch/mips/dts/linkit-smart-7688.dts
>> diff --git a/board/seeed/linkit-smart-7688/Makefile b/board/seeed/linkit-smart-7688/Makefile
>> new file mode 100644
>> index 0000000000..70cd7a8e56
>> --- /dev/null
>> +++ b/board/seeed/linkit-smart-7688/Makefile
>> @@ -0,0 +1,3 @@
>> +# SPDX-License-Identifier: GPL-2.0+
>> +
>> +obj-y += board.o
>> diff --git a/board/seeed/linkit-smart-7688/board.c b/board/seeed/linkit-smart-7688/board.c
>> new file mode 100644
>> index 0000000000..fbe94cc292
>> --- /dev/null
>> +++ b/board/seeed/linkit-smart-7688/board.c
>> @@ -0,0 +1,22 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Copyright (C) 2018 Stefan Roese <sr at denx.de>
>> + */
>> +
>> +#include <common.h>
>> +#include <asm/io.h>
>> +
>> +#define MT76XX_GPIO1_MODE	0xb0000060
> 
> should be a physical address
> 
>> +
>> +void board_debug_uart_init(void)
>> +{
>> +	/* Select UART2 mode instead of GPIO mode (default) */
>> +	clrbits_le32((void __iomem *)MT76XX_GPIO1_MODE, GENMASK(27, 26));
> 
> with the comment above, this is preferred:
> 
> void __iomem *gpio_mode = ioremap_nocache(MT76XX_GPIO1_MODE);
> clrbits_le32(gpio_mode), GENMASK(27, 26));

Okay, will change.

>> +}
>> +
>> +int board_early_init_f(void)
>> +{
>> +	board_debug_uart_init();
> 
> this will be called automatically if you enable CONFIG_DEBUG_UART_BOARD_INIT

Yes. But I plan to de-select DEBUG_UART support at some time (after
the port has stabilized at bit more). And then this pin muxing is
needed here as well. I could add a comment here to make this clear.

Thanks,
Stefan


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