[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

The following changes since commit a032e0a6aed208977f48e78d2cc497b91543beaf:

  travis: give every job a name (2018-08-10 13:50:30 -0400)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to b0c0a715f90690a7dd4f33cb5b5c21960be26d3c:

  arm: socfpga: Fix SYSMGR_FPGAINTF_EMACx bit mask (2018-08-15 12:41:09
+0200)

----------------------------------------------------------------
Ley Foon Tan (1):
      arm: socfpga: Fix SYSMGR_FPGAINTF_EMACx bit mask

Marek Vasut (20):
      ARM: socfpga: Register the FPGA on A10 in SPL again
      ARM: dts: socfpga: Flag reset manager on A10 as pre-reloc
      ARM: dts: socfpga: Add missing UART resets
      ARM: dts: socfpga: Fix Arria10 GMAC resets
      ARM: dts: socfpga: Add missing I2C resets
      ARM: dts: socfpga: Add i2c alias to A10 SoCDK
      ARM: socfpga: Enable DM reset framework on A10
      ARM: socfpga: Enable DM I2C framework on A10
      ARM: socfpga: Zap all the UART handling complexity
      net: designware: socfpga: Add Arria10 extras
      ARM: socfpga: Zap unused reset code
      ARM: socfpga: Remove adhoc ethernet reset and configuration
      ARM: socfpga: Enable DM ethernet on A10
      ARM: socfpga: clk: Obtain handoff base clock via DM
      ARM: socfpga: clk: Make L4SP and MMC clock calculation Gen5 only
      ARM: socfpga: clk: Drop unused variables on Arria10
      ARM: dts: socfpga: Add u-boot,dm-pre-reloc to necessary clock nodes
      clk: socfpga: Add initial Arria10 clock driver
      mmc: socfpga: Add clock framework support
      ARM: socfpga: clk: Convert to clock framework

Simon Goldschmidt (5):
      arm: socfpga: fix SPL on gen5 after moving to DM serial
      arm: socfpga: spl_gen5: clean up malloc_base assignment
      arm: socfpga: cyclone5: handle debug uart
      arm: socfpga: fix device trees to work with DM serial
      arm: socfpga: gen5: combine some init code for SPL and U-Boot

 arch/arm/Kconfig                                           |   2 +-
 arch/arm/dts/socfpga_arria10.dtsi                          |  32
++++++++++--
 arch/arm/dts/socfpga_arria10_socdk.dtsi                    |  26 ++++++++++
 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts               |  17 ++++++
 arch/arm/dts/socfpga_arria5_socdk.dts                      |   5 ++
 arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts                 |   5 ++
 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts             |   5 ++
 arch/arm/dts/socfpga_cyclone5_de10_nano.dts                |   5 ++
 arch/arm/dts/socfpga_cyclone5_de1_soc.dts                  |   5 ++
 arch/arm/dts/socfpga_cyclone5_is1.dts                      |   5 ++
 arch/arm/dts/socfpga_cyclone5_socdk.dts                    |   5 ++
 arch/arm/dts/socfpga_cyclone5_sockit.dts                   |   5 ++
 arch/arm/dts/socfpga_cyclone5_socrates.dts                 |   5 ++
 arch/arm/dts/socfpga_cyclone5_sr1500.dts                   |   2 +
 arch/arm/dts/socfpga_cyclone5_vining_fpga.dts              |   5 ++
 arch/arm/mach-socfpga/Kconfig                              |  10 ++++
 arch/arm/mach-socfpga/clock_manager.c                      |   2 +
 arch/arm/mach-socfpga/clock_manager_arria10.c              | 306
++++++++++++++++++++++++------------------------------------------------------------------------------------
 arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h |   6 ---
 arch/arm/mach-socfpga/include/mach/misc.h                  |   6 +--
 arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h |   4 --
 arch/arm/mach-socfpga/include/mach/system_manager_s10.h    |   6 +--
 arch/arm/mach-socfpga/misc_arria10.c                       | 176
--------------------------------------------------------------
 arch/arm/mach-socfpga/misc_gen5.c                          |  29
++++++-----
 arch/arm/mach-socfpga/reset_manager_arria10.c              | 135
------------------------------------------------
 arch/arm/mach-socfpga/spl_a10.c                            |   9 ++--
 arch/arm/mach-socfpga/spl_gen5.c                           |  44
+++++-----------
 configs/socfpga_arria10_defconfig                          |   2 +
 drivers/clk/Makefile                                       |   1 +
 drivers/clk/altera/Makefile                                |   7 +++
 drivers/clk/altera/clk-arria10.c                           | 363
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/mmc/socfpga_dw_mmc.c                               |  40
++++++++++----
 drivers/net/Kconfig                                        |   8 +++
 drivers/net/Makefile                                       |   1 +
 drivers/net/dwmac_socfpga.c                                | 143
+++++++++++++++++++++++++++++++++++++++++++++++++++
 35 files changed, 800 insertions(+), 627 deletions(-)
 create mode 100644 drivers/clk/altera/Makefile
 create mode 100644 drivers/clk/altera/clk-arria10.c
 create mode 100644 drivers/net/dwmac_socfpga.c