[U-Boot] [PATCH v3 5/7] rockchip: rk3288-phycore: set flash1 iodomain to 1.8V

Janine Hagemann j.hagemann at phytec.de
Wed Aug 22 06:08:23 UTC 2018


This pin is supplied by 1.8V, but the default iodomain
setting is 3.3V.

Signed-off-by: Janine Hagemann <j.hagemann at phytec.de>
---
v3: No changes
---
 board/phytec/phycore_rk3288/phycore-rk3288.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c
index ffe1833..8c1844a 100644
--- a/board/phytec/phycore_rk3288/phycore-rk3288.c
+++ b/board/phytec/phycore_rk3288/phycore-rk3288.c
@@ -11,6 +11,11 @@
 #include <i2c.h>
 #include <i2c_eeprom.h>
 #include <netdev.h>
+#include <syscon.h>
+#include <asm/arch/cru_rk3288.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk3288.h>
 #include "som.h"
 
 static int valid_rk3288_som(struct rk3288_som *som)
@@ -27,6 +32,15 @@ static int valid_rk3288_som(struct rk3288_som *som)
 	return hw == som->bs;
 }
 
+static void setup_iodomain(void)
+{
+	const u32 GRF_IO_VSEL_FLASH1_SHIFT = 3;
+	struct rk3288_grf *grf =
+		syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_FLASH1_SHIFT);
+}
+
 int rk_board_late_init(void)
 {
 	int ret;
@@ -34,6 +48,8 @@ int rk_board_late_init(void)
 	struct rk3288_som opt;
 	int off;
 
+	setup_iodomain();
+
 	/* Get the identificatioin page of M24C32-D EEPROM */
 	off = fdt_path_offset(gd->fdt_blob, "eeprom0");
 	if (off < 0) {
-- 
2.7.4



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