[U-Boot] [PATCH v2 04/13] pinctrl: renesas: Fix signed shift overflow

Eugeniu Rosca roscaeugeniu at gmail.com
Sun Aug 26 23:13:22 UTC 2018


Booting R-Car H3-Salvator-X (CONFIG_UBSAN=y) consistently results in:

 =====================================================================
 UBSAN: Undefined behaviour in drivers/pinctrl/renesas/pfc.c:402:40
 left shift of 1 by 31 places cannot be represented in type 'int'
 =====================================================================
 =====================================================================
 UBSAN: Undefined behaviour in drivers/pinctrl/renesas/pfc.c:410:39
 left shift of 1 by 31 places cannot be represented in type 'int'
 =====================================================================

While fixing these warnings, convert *all* SH_PFC_PIN_CFG_* definitions
to use the recommended BIT() macro.

Fixes: 910df4d07e37 ("pinctrl: rmobile: Add Renesas RCar pincontrol driver")
Signed-off-by: Eugeniu Rosca <erosca at de.adit-jv.com>
Acked-by: Marek Vasut <marek.vasut at gmail.com>
---

Changes in v2:
 - Shorten the summary line
 - Add "Acked-by: Marek Vasut <marek.vasut at gmail.com>"
---
 drivers/pinctrl/renesas/sh_pfc.h | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h
index b98c2f185d26..b58e52bbfbb9 100644
--- a/drivers/pinctrl/renesas/sh_pfc.h
+++ b/drivers/pinctrl/renesas/sh_pfc.h
@@ -21,13 +21,13 @@ enum {
 	PINMUX_TYPE_INPUT,
 };
 
-#define SH_PFC_PIN_CFG_INPUT		(1 << 0)
-#define SH_PFC_PIN_CFG_OUTPUT		(1 << 1)
-#define SH_PFC_PIN_CFG_PULL_UP		(1 << 2)
-#define SH_PFC_PIN_CFG_PULL_DOWN	(1 << 3)
-#define SH_PFC_PIN_CFG_IO_VOLTAGE	(1 << 4)
-#define SH_PFC_PIN_CFG_DRIVE_STRENGTH	(1 << 5)
-#define SH_PFC_PIN_CFG_NO_GPIO		(1 << 31)
+#define SH_PFC_PIN_CFG_INPUT		BIT(0)
+#define SH_PFC_PIN_CFG_OUTPUT		BIT(1)
+#define SH_PFC_PIN_CFG_PULL_UP		BIT(2)
+#define SH_PFC_PIN_CFG_PULL_DOWN	BIT(3)
+#define SH_PFC_PIN_CFG_IO_VOLTAGE	BIT(4)
+#define SH_PFC_PIN_CFG_DRIVE_STRENGTH	BIT(5)
+#define SH_PFC_PIN_CFG_NO_GPIO		BIT(31)
 
 struct sh_pfc_pin {
 	u16 pin;
-- 
2.18.0



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