[U-Boot] [PATCH v2 07/13] x86: Fix signed shift overflow in MSR_IA32_APICBASE_BASE

[Eugeniu Rosca]

Fix the following UBSAN report:
 ======================================================================
 UBSAN: Undefined behaviour in arch/x86/cpu/lapic.c:73:14
 left shift of 1048575 by 12 places cannot be represented in type 'int'
 ======================================================================

Steps to reproduce the above:
* echo CONFIG_UBSAN=y >> configs/qemu-x86_defconfig
* make ARCH=x86 qemu-x86_defconfig all
* qemu-system-i386 --version
  QEMU emulator version 2.5.0 (Debian 1:2.5+dfsg-5ubuntu10.31)
* qemu-system-i386 --nographic -bios u-boot.rom

Fixes: 98568f0fa96b ("x86: Import MSR/MTRR code from Linux")
Signed-off-by: Eugeniu Rosca <erosca at de.adit-jv.com>
---

Changes in v2:
 - None. Newly pushed.
---
 arch/x86/include/asm/msr-index.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 9c1dbe61d596..d8b7b8013c74 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -370,7 +370,7 @@
 #define MSR_IA32_APICBASE		0x0000001b
 #define MSR_IA32_APICBASE_BSP		(1<<8)
 #define MSR_IA32_APICBASE_ENABLE	(1<<11)
-#define MSR_IA32_APICBASE_BASE		(0xfffff<<12)
+#define MSR_IA32_APICBASE_BASE		(0xfffffUL << 12)
 
 #define MSR_IA32_TSCDEADLINE		0x000006e0
 
-- 
2.18.0