[U-Boot] [PATCH 1/4] armv8: fsl-layerscape: add missing qe base address define

laurentiu.tudor at nxp.com laurentiu.tudor at nxp.com
Mon Aug 27 14:33:57 UTC 2018


From: Laurentiu Tudor <laurentiu.tudor at nxp.com>

Add define for quiccengine register block base address.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor at nxp.com>
---
 arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index be0a6ae363..8c10526a6c 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -85,6 +85,8 @@
 #define GPIO3_BASE_ADDR				(CONFIG_SYS_IMMR + 0x1320000)
 #define GPIO4_BASE_ADDR				(CONFIG_SYS_IMMR + 0x1330000)
 
+#define QE_BASE_ADDR				(CONFIG_SYS_IMMR + 0x1400000)
+
 #define LPUART_BASE				(CONFIG_SYS_IMMR + 0x01950000)
 
 #define EDMA_BASE_ADDR				(CONFIG_SYS_IMMR + 0x01c00000)
-- 
2.17.1



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