[U-Boot] [PATCH 08/11] sh: tmu: Inline sh_tmu.h

[Marek Vasut]

The header contains only the TMU register layout, just inline it
into the TMU timer implementation and drop the header completely.

Signed-off-by: Marek Vasut <marek.vasut+renesas at gmail.com>
---
 arch/sh/lib/time.c | 43 +++++++++++++++++++++++++++-
 include/sh_tmu.h   | 70 ----------------------------------------------
 2 files changed, 42 insertions(+), 71 deletions(-)
 delete mode 100644 include/sh_tmu.h

diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c
index 9a1d3fb013..a650c9478c 100644
--- a/arch/sh/lib/time.c
+++ b/arch/sh/lib/time.c
@@ -13,7 +13,48 @@
 #include <common.h>
 #include <asm/processor.h>
 #include <asm/io.h>
-#include <sh_tmu.h>
+
+#if defined(CONFIG_CPU_SH3)
+struct tmu_regs {
+	u8	tocr;
+	u8	reserved0;
+	u8	tstr;
+	u8	reserved1;
+	u32	tcor0;
+	u32	tcnt0;
+	u16	tcr0;
+	u16	reserved2;
+	u32	tcor1;
+	u32	tcnt1;
+	u16	tcr1;
+	u16	reserved3;
+	u32	tcor2;
+	u32	tcnt2;
+	u16	tcr2;
+	u16	reserved4;
+	u32	tcpr2;
+};
+#endif /* CONFIG_CPU_SH3 */
+
+#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_RMOBILE)
+struct tmu_regs {
+	u32	reserved;
+	u8	tstr;
+	u8	reserved2[3];
+	u32	tcor0;
+	u32	tcnt0;
+	u16	tcr0;
+	u16	reserved3;
+	u32	tcor1;
+	u32	tcnt1;
+	u16	tcr1;
+	u16	reserved4;
+	u32	tcor2;
+	u32	tcnt2;
+	u16	tcr2;
+	u16	reserved5;
+};
+#endif /* CONFIG_CPU_SH4 */
 
 #define TCR_TPSC 0x07
 #define TSTR_STR0	BIT(0)
diff --git a/include/sh_tmu.h b/include/sh_tmu.h
deleted file mode 100644
index 70aca2149a..0000000000
--- a/include/sh_tmu.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * Copyright (C) 2012  Renesas Solutions Corp.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __SH_TMU_H
-#define __SH_TMU_H
-
-#include <asm/types.h>
-
-#if defined(CONFIG_CPU_SH3)
-struct tmu_regs {
-	u8	tocr;
-	u8	reserved0;
-	u8	tstr;
-	u8	reserved1;
-	u32	tcor0;
-	u32	tcnt0;
-	u16	tcr0;
-	u16	reserved2;
-	u32	tcor1;
-	u32	tcnt1;
-	u16	tcr1;
-	u16	reserved3;
-	u32	tcor2;
-	u32	tcnt2;
-	u16	tcr2;
-	u16	reserved4;
-	u32	tcpr2;
-};
-#endif /* CONFIG_CPU_SH3 */
-
-#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_RMOBILE)
-struct tmu_regs {
-	u32 reserved;
-	u8  tstr;
-	u8  reserved2[3];
-	u32 tcor0;
-	u32 tcnt0;
-	u16 tcr0;
-	u16 reserved3;
-	u32 tcor1;
-	u32 tcnt1;
-	u16 tcr1;
-	u16 reserved4;
-	u32 tcor2;
-	u32 tcnt2;
-	u16 tcr2;
-	u16 reserved5;
-};
-#endif /* CONFIG_CPU_SH4 */
-
-#endif	/* __SH_TMU_H */
-- 
2.18.0