[U-Boot] [PATCH v1 3/3] ddr: vybrid: Add calibration code to memory controler's (DDRMC) setup code

[Stefan Agner]

On 02.12.2018 21:42, Lukasz Majewski wrote:
> This patch extends the vf610 DDR memory controller code to support SW
> leveling.
> 
> Signed-off-by: Lukasz Majewski <lukma at denx.de>
> 
> ---
> 
>  arch/arm/mach-imx/ddrmc-vf610.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm/mach-imx/ddrmc-vf610.c b/arch/arm/mach-imx/ddrmc-vf610.c
> index ea6a49e0fa..8474023fae 100644
> --- a/arch/arm/mach-imx/ddrmc-vf610.c
> +++ b/arch/arm/mach-imx/ddrmc-vf610.c
> @@ -10,6 +10,9 @@
>  #include <asm/arch/imx-regs.h>
>  #include <asm/arch/iomux-vf610.h>
>  #include <asm/arch/ddrmc-vf610.h>
> +#ifdef CONFIG_DDRMC_VF610_CALIBRATION
> +#include "ddrmc-vf610-calibration.h"
> +#endif

Is this ifdef needed? I think it should be fine to always include...

Otherwise:

Reviewed-by: Stefan Agner <stefan.agner at toradex.com>

--
Stefan


>  
>  void ddrmc_setup_iomux(const iomux_v3_cfg_t *pads, int pads_count)
>  {
> @@ -233,4 +236,8 @@ void ddrmc_ctrl_init_ddr3(struct
> ddr3_jedec_timings const *timings,
>  
>  	while (!(readl(&ddrmr->cr[80]) & 0x100))
>  		udelay(10);
> +
> +#ifdef CONFIG_DDRMC_VF610_CALIBRATION
> +	ddrmc_calibration(ddrmr);
> +#endif
>  }