[U-Boot] [PATCH 2/2] riscv: qemu: Enable SiFive UART driver in defconfigs

Anup Patel anup at brainfault.org
Wed Dec 5 06:29:24 UTC 2018


This patch enables SiFive UART driver in all QEMU RISC-V defconfigs.

Signed-off-by: Anup Patel <anup at brainfault.org>
---
 configs/qemu-riscv32_defconfig       | 1 +
 configs/qemu-riscv32_smode_defconfig | 1 +
 configs/qemu-riscv64_defconfig       | 1 +
 configs/qemu-riscv64_smode_defconfig | 1 +
 4 files changed, 4 insertions(+)

diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig
index 6334d8c0fc..79c8d54cc7 100644
--- a/configs/qemu-riscv32_defconfig
+++ b/configs/qemu-riscv32_defconfig
@@ -7,3 +7,4 @@ CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 # CONFIG_CMD_MII is not set
 CONFIG_OF_PRIOR_STAGE=y
+CONFIG_SIFIVE_SERIAL=y
diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig
index 0a84ec1874..b733dbed2f 100644
--- a/configs/qemu-riscv32_smode_defconfig
+++ b/configs/qemu-riscv32_smode_defconfig
@@ -8,3 +8,4 @@ CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 # CONFIG_CMD_MII is not set
 CONFIG_OF_PRIOR_STAGE=y
+CONFIG_SIFIVE_SERIAL=y
diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig
index 2d9ead93a2..a9d19a5574 100644
--- a/configs/qemu-riscv64_defconfig
+++ b/configs/qemu-riscv64_defconfig
@@ -8,3 +8,4 @@ CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 # CONFIG_CMD_MII is not set
 CONFIG_OF_PRIOR_STAGE=y
+CONFIG_SIFIVE_SERIAL=y
diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig
index b012443370..8adc23f826 100644
--- a/configs/qemu-riscv64_smode_defconfig
+++ b/configs/qemu-riscv64_smode_defconfig
@@ -9,3 +9,4 @@ CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 # CONFIG_CMD_MII is not set
 CONFIG_OF_PRIOR_STAGE=y
+CONFIG_SIFIVE_SERIAL=y
-- 
2.17.1



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