[U-Boot] [PATCH v4 0/7] Add support for the SoCs found in Microsemi switches

Gregory CLEMENT gregory.clement at bootlin.com
Fri Dec 14 15:16:44 UTC 2018


Hello,

For the record this the fourth version of the series adding the
support of 2 SoCs: Ocelot and Luton from Microsemi. Both of them
belongs to the same family Vcore III.

We found them on various advanced switches product.

The support for Ocelot already have been submit to Linux, but not yet
the Luton support.

The comments on v3 were fewer and quite easy to address, so I am able
to send a new version right one (hopping it will be the final one :)
).

Gregory

Changelog:

v3 -> v4:

 - add the support for the legacy kernel more generic and more related
   to the old bootloader: redboot
 - removed useless test on CONFIG_ARCH_MSCC in
   arch/mips/mach-mscc/include/ioremap.h
 - add an explanation about the cache instruction lock in
   hal_vcoreiii_ddr_failed()
 - use __raw_read/write instead of directly use pointer dereferencing
 - use rmb instead of asm volatile("" : : : "memory");
 - remove remaining C++ style comment
 - use __maybe_unused instead of __attribute__ ((unused))
 - indent by an extra space the instructions in the delay slot


v2 -> v3:
 - Added n entry in the MAINTAINER file for the SoCs
 - Fixup the last errors from checkpatch, the remaining ones are only
   about volatile, long line and Kconfig, but each ones have good
   reason to be here.
 - Add SPI NAND flash support in device tree and configuration files,
   the driver are already be merged in U-Boot.
 - In order to improve boot time, setup the TLB to allow using cache
   in the memory mapped to the SPI NOR.
 - Removed all the macro REG_CFG to only keep direct access to memory.
 - Put back the setting of the interrupt map as it is needed by
   mainline kernel (without it the kernel doesn't finish to boot)
 - During DDR training, prevent the compiler reordering the
   instruction.
 - Add early debug support to Ocelot (it was already done for Luton)

v1 -> v2:
 - a big clean-up for indentation and some style issue
 - usage of the clrsetbits family functions where it was possible
 - split the patches for Ocelot and Luton
 - add a new patch to introduce the icache_lock function which was in
   the mscc directory in the first version
 - remove more unused define in the platform header files
 - use the automatic cache size detection instead of hard coding it
 - reduce the tlb init to only two entries for the IO as needed by the
    kernel
 - remove the interrupt disabling
 - fix the ddr init for luton

Gregory CLEMENT (7):
  MIPS: move create_tlb() in an proper header: mipsregs.h
  MIPS: Allow to prefetch and lock instructions into cache
  MSCC: add support for Ocelot SoCs
  MSCC: add support for Luton SoCs
  MSCC: add board support for the Ocelots based evaluation boards
  MSCC: add board support for the Luton based evaluation board
  MIPS: bootm: Add support for compatibility with redboot

 MAINTAINERS                                   |  13 +
 arch/mips/Kconfig                             |  10 +
 arch/mips/Makefile                            |   1 +
 arch/mips/cpu/cpu.c                           |  10 -
 arch/mips/dts/luton_pcb091.dts                |  36 +
 arch/mips/dts/mscc,luton.dtsi                 |  87 ++
 arch/mips/dts/mscc,ocelot.dtsi                | 152 ++++
 arch/mips/dts/mscc,ocelot_pcb.dtsi            |  42 +
 arch/mips/dts/ocelot_pcb120.dts               |  12 +
 arch/mips/dts/ocelot_pcb123.dts               |  12 +
 arch/mips/include/asm/cacheops.h              |  19 +
 arch/mips/include/asm/mipsregs.h              |  11 +
 arch/mips/lib/bootm.c                         |  76 +-
 arch/mips/mach-mscc/Kconfig                   |  86 ++
 arch/mips/mach-mscc/Makefile                  |   6 +
 arch/mips/mach-mscc/cpu.c                     | 102 +++
 arch/mips/mach-mscc/dram.c                    |  73 ++
 arch/mips/mach-mscc/include/ioremap.h         |  49 ++
 arch/mips/mach-mscc/include/mach/common.h     |  28 +
 arch/mips/mach-mscc/include/mach/ddr.h        | 814 ++++++++++++++++++
 .../mips/mach-mscc/include/mach/luton/luton.h |  24 +
 .../include/mach/luton/luton_devcpu_gcb.h     |  14 +
 .../include/mach/luton/luton_icpu_cfg.h       | 245 ++++++
 .../mach-mscc/include/mach/ocelot/ocelot.h    |  24 +
 .../include/mach/ocelot/ocelot_devcpu_gcb.h   |  21 +
 .../include/mach/ocelot/ocelot_icpu_cfg.h     | 274 ++++++
 arch/mips/mach-mscc/include/mach/tlb.h        |  55 ++
 arch/mips/mach-mscc/lowlevel_init.S           |  30 +
 arch/mips/mach-mscc/lowlevel_init_luton.S     |  62 ++
 arch/mips/mach-mscc/reset.c                   |  30 +
 board/mscc/luton/Kconfig                      |  14 +
 board/mscc/luton/Makefile                     |   3 +
 board/mscc/luton/luton.c                      |  28 +
 board/mscc/ocelot/Kconfig                     |  14 +
 board/mscc/ocelot/Makefile                    |   4 +
 board/mscc/ocelot/ocelot.c                    |  58 ++
 configs/mscc_luton_defconfig                  |  66 ++
 configs/mscc_ocelot_defconfig                 |  73 ++
 configs/mscc_ocelot_pcb120_defconfig          |  66 ++
 include/configs/vcoreiii.h                    |  82 ++
 40 files changed, 2796 insertions(+), 30 deletions(-)
 create mode 100644 arch/mips/dts/luton_pcb091.dts
 create mode 100644 arch/mips/dts/mscc,luton.dtsi
 create mode 100644 arch/mips/dts/mscc,ocelot.dtsi
 create mode 100644 arch/mips/dts/mscc,ocelot_pcb.dtsi
 create mode 100644 arch/mips/dts/ocelot_pcb120.dts
 create mode 100644 arch/mips/dts/ocelot_pcb123.dts
 create mode 100644 arch/mips/mach-mscc/Kconfig
 create mode 100644 arch/mips/mach-mscc/Makefile
 create mode 100644 arch/mips/mach-mscc/cpu.c
 create mode 100644 arch/mips/mach-mscc/dram.c
 create mode 100644 arch/mips/mach-mscc/include/ioremap.h
 create mode 100644 arch/mips/mach-mscc/include/mach/common.h
 create mode 100644 arch/mips/mach-mscc/include/mach/ddr.h
 create mode 100644 arch/mips/mach-mscc/include/mach/luton/luton.h
 create mode 100644 arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h
 create mode 100644 arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h
 create mode 100644 arch/mips/mach-mscc/include/mach/ocelot/ocelot.h
 create mode 100644 arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h
 create mode 100644 arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h
 create mode 100644 arch/mips/mach-mscc/include/mach/tlb.h
 create mode 100644 arch/mips/mach-mscc/lowlevel_init.S
 create mode 100644 arch/mips/mach-mscc/lowlevel_init_luton.S
 create mode 100644 arch/mips/mach-mscc/reset.c
 create mode 100644 board/mscc/luton/Kconfig
 create mode 100644 board/mscc/luton/Makefile
 create mode 100644 board/mscc/luton/luton.c
 create mode 100644 board/mscc/ocelot/Kconfig
 create mode 100644 board/mscc/ocelot/Makefile
 create mode 100644 board/mscc/ocelot/ocelot.c
 create mode 100644 configs/mscc_luton_defconfig
 create mode 100644 configs/mscc_ocelot_defconfig
 create mode 100644 configs/mscc_ocelot_pcb120_defconfig
 create mode 100644 include/configs/vcoreiii.h

-- 
2.19.2



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