[U-Boot] [PATCH v5] zynq-gem: Use appropriate cache flush/invalidate for RX and TX

[Michal Simek]

On 17. 12. 18 9:12, Stefan Theil wrote:
> The cache was only flushed before *transmitting* packets, but not
> when receiving them, leading to an issue where new packets were
> handed to the receive handler with old contents in cache. This
> only happens when a lot of packets are received without sending
> packages every now and then. Also flushing the receive buffers
> in the transmit function makes no sense and can be removed.
> 
> Signed-off-by: Stefan Theil <stefan.theil at mixed-mode.de>
> 
> ---
> Changes for v2:
> 	- Use invalidate_dcache_range instead of
> 	  flush_dcache_range
> Changes for v3:
> 	- Remove unnecessary flushing of all RX
> 	  buffers in zynq_gem_send
> Changes for v4:
> 	- Invalidate receive buffers after allocating
> 	  them in zynq_gem_probe
> Changes for v5:
> 	- Clear and flush receive buffers in
> 	  zynq_gem_probe instead of invalidating the
> 	  cache
> ---
>  drivers/net/zynq_gem.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
> index 9bd79b198a..3bd0093b7a 100644
> --- a/drivers/net/zynq_gem.c
> +++ b/drivers/net/zynq_gem.c
> @@ -570,11 +570,6 @@ static int zynq_gem_send(struct udevice *dev, void *ptr, int len)
>  	addr &= ~(ARCH_DMA_MINALIGN - 1);
>  	size = roundup(len, ARCH_DMA_MINALIGN);
>  	flush_dcache_range(addr, addr + size);
> -
> -	addr = (ulong)priv->rxbuffers;
> -	addr &= ~(ARCH_DMA_MINALIGN - 1);
> -	size = roundup((RX_BUF * PKTSIZE_ALIGN), ARCH_DMA_MINALIGN);
> -	flush_dcache_range(addr, addr + size);
>  	barrier();
>  
>  	/* Start transmit */
> @@ -621,6 +616,9 @@ static int zynq_gem_recv(struct udevice *dev, int flags, uchar **packetp)
>  
>  	*packetp = (uchar *)(uintptr_t)addr;
>  
> +	invalidate_dcache_range(addr, addr + roundup(PKTSIZE_ALIGN, ARCH_DMA_MINALIGN));
> +	barrier();
> +
>  	return frame_len;
>  }
>  
> @@ -706,6 +704,9 @@ static int zynq_gem_probe(struct udevice *dev)
>  		return -ENOMEM;
>  
>  	memset(priv->rxbuffers, 0, RX_BUF * PKTSIZE_ALIGN);
> +	u32 addr = (ulong)priv->rxbuffers;
> +	flush_dcache_range(addr, addr + roundup(RX_BUF * PKTSIZE_ALIGN, ARCH_DMA_MINALIGN));
> +	barrier();
>  
>  	/* Align bd_space to MMU_SECTION_SHIFT */
>  	bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE);
> 

Applied.
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs


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