[U-Boot] [PATCH 6/6] board: stm32: switch to DM STM32 timer
patrice.chotard at st.com
patrice.chotard at st.com
Wed Feb 7 09:44:50 UTC 2018
From: Patrice Chotard <patrice.chotard at st.com>
Use available DM stm32_timer driver instead of dedicated
mach-stm32/stm32fx/timer.c.
Remove all defines or files previously used for timer usage in
arch/arm/include/asm/arch-stm32fx and in arch/arm/mach-stm32/stm32fx
Enable DM STM32_TIMER for STM32F4/F7 and H7.
Signed-off-by: Patrice Chotard <patrice.chotard at st.com>
---
arch/arm/include/asm/arch-stm32f4/stm32.h | 3 -
arch/arm/include/asm/arch-stm32f4/stm32_defs.h | 15 ---
arch/arm/include/asm/arch-stm32f7/gpt.h | 53 -----------
arch/arm/include/asm/arch-stm32f7/stm32.h | 5 -
arch/arm/include/asm/arch-stm32f7/stm32_defs.h | 15 ---
arch/arm/include/asm/arch-stm32f7/stm32_periph.h | 4 -
arch/arm/mach-stm32/Kconfig | 7 ++
arch/arm/mach-stm32/Makefile | 2 -
arch/arm/mach-stm32/stm32f4/Makefile | 11 ---
arch/arm/mach-stm32/stm32f4/timer.c | 115 -----------------------
arch/arm/mach-stm32/stm32f7/Makefile | 8 --
arch/arm/mach-stm32/stm32f7/timer.c | 113 ----------------------
board/st/stm32f746-disco/stm32f746-disco.c | 1 -
drivers/clk/clk_stm32f.c | 15 ---
drivers/spi/stm32_qspi.c | 1 -
include/configs/stm32h743-disco.h | 3 +-
include/configs/stm32h743-eval.h | 3 +-
17 files changed, 9 insertions(+), 365 deletions(-)
delete mode 100644 arch/arm/include/asm/arch-stm32f4/stm32_defs.h
delete mode 100644 arch/arm/include/asm/arch-stm32f7/gpt.h
delete mode 100644 arch/arm/include/asm/arch-stm32f7/stm32_defs.h
delete mode 100644 arch/arm/mach-stm32/stm32f4/Makefile
delete mode 100644 arch/arm/mach-stm32/stm32f4/timer.c
delete mode 100644 arch/arm/mach-stm32/stm32f7/Makefile
delete mode 100644 arch/arm/mach-stm32/stm32f7/timer.c
diff --git a/arch/arm/include/asm/arch-stm32f4/stm32.h b/arch/arm/include/asm/arch-stm32f4/stm32.h
index 0449fcecede0..763b18cb5412 100644
--- a/arch/arm/include/asm/arch-stm32f4/stm32.h
+++ b/arch/arm/include/asm/arch-stm32f4/stm32.h
@@ -38,9 +38,6 @@ struct stm32_u_id_regs {
#define STM32_U_ID_BASE (STM32_SYSMEM_BASE + 0x7A10)
#define STM32_U_ID ((struct stm32_u_id_regs *)STM32_U_ID_BASE)
-#define STM32_RCC_BASE (STM32_AHB1PERIPH_BASE + 0x3800)
-#define STM32_RCC ((struct stm32_rcc_regs *)STM32_RCC_BASE)
-
#define FLASH_CNTL_BASE (STM32_AHB1PERIPH_BASE + 0x3C00)
static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
diff --git a/arch/arm/include/asm/arch-stm32f4/stm32_defs.h b/arch/arm/include/asm/arch-stm32f4/stm32_defs.h
deleted file mode 100644
index 9a967ac38a1f..000000000000
--- a/arch/arm/include/asm/arch-stm32f4/stm32_defs.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
- * Author(s): Vikas Manocha, <vikas.manocha at st.com> for STMicroelectronics.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __STM32_DEFS_H__
-#define __STM32_DEFS_H__
-#include <asm/arch/stm32_periph.h>
-
-int clock_setup(enum periph_clock);
-
-#endif
-
diff --git a/arch/arm/include/asm/arch-stm32f7/gpt.h b/arch/arm/include/asm/arch-stm32f7/gpt.h
deleted file mode 100644
index b43dc612c847..000000000000
--- a/arch/arm/include/asm/arch-stm32f7/gpt.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
- * Author(s): Vikas Manocha, <vikas.manocha at st.com> for STMicroelectronics.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _STM32_GPT_H
-#define _STM32_GPT_H
-
-#include <asm/arch/stm32.h>
-
-struct gpt_regs {
- u32 cr1;
- u32 cr2;
- u32 smcr;
- u32 dier;
- u32 sr;
- u32 egr;
- u32 ccmr1;
- u32 ccmr2;
- u32 ccer;
- u32 cnt;
- u32 psc;
- u32 arr;
- u32 reserved;
- u32 ccr1;
- u32 ccr2;
- u32 ccr3;
- u32 ccr4;
- u32 reserved1;
- u32 dcr;
- u32 dmar;
- u32 tim2_5_or;
-};
-
-struct gpt_regs *const gpt1_regs_ptr =
- (struct gpt_regs *)TIM2_BASE;
-
-/* Timer control1 register */
-#define GPT_CR1_CEN BIT(0)
-#define GPT_MODE_AUTO_RELOAD BIT(7)
-
-/* Auto reload register for free running config */
-#define GPT_FREE_RUNNING 0xFFFFFFFF
-
-/* Timer, HZ specific defines */
-#define CONFIG_STM32_HZ 1000
-
-/* Timer Event Generation registers */
-#define TIM_EGR_UG BIT(0)
-
-#endif
diff --git a/arch/arm/include/asm/arch-stm32f7/stm32.h b/arch/arm/include/asm/arch-stm32f7/stm32.h
index f54e6f195575..40df89142608 100644
--- a/arch/arm/include/asm/arch-stm32f7/stm32.h
+++ b/arch/arm/include/asm/arch-stm32f7/stm32.h
@@ -25,7 +25,6 @@
#define AHB2_PERIPH_BASE (PERIPH_BASE + 0x10000000)
#define AHB3_PERIPH_BASE (PERIPH_BASE + 0x20000000)
-#define TIM2_BASE (APB1_PERIPH_BASE + 0x0000)
#define USART2_BASE (APB1_PERIPH_BASE + 0x4400)
#define USART3_BASE (APB1_PERIPH_BASE + 0x4800)
#define PWR_BASE (APB1_PERIPH_BASE + 0x7000)
@@ -45,7 +44,6 @@
#define STM32_GPIOI_BASE (AHB1_PERIPH_BASE + 0x2000)
#define STM32_GPIOJ_BASE (AHB1_PERIPH_BASE + 0x2400)
#define STM32_GPIOK_BASE (AHB1_PERIPH_BASE + 0x2800)
-#define RCC_BASE (AHB1_PERIPH_BASE + 0x3800)
#define FLASH_CNTL_BASE (AHB1_PERIPH_BASE + 0x3C00)
@@ -59,9 +57,6 @@ static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
#define STM32_BUS_MASK GENMASK(31, 16)
-#define STM32_RCC ((struct stm32_rcc_regs *)RCC_BASE)
-
-
void stm32_flash_latency_cfg(int latency);
#endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/include/asm/arch-stm32f7/stm32_defs.h b/arch/arm/include/asm/arch-stm32f7/stm32_defs.h
deleted file mode 100644
index 9a967ac38a1f..000000000000
--- a/arch/arm/include/asm/arch-stm32f7/stm32_defs.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
- * Author(s): Vikas Manocha, <vikas.manocha at st.com> for STMicroelectronics.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __STM32_DEFS_H__
-#define __STM32_DEFS_H__
-#include <asm/arch/stm32_periph.h>
-
-int clock_setup(enum periph_clock);
-
-#endif
-
diff --git a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
index 7b8f66a0346b..38d4ade13d2f 100644
--- a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
+++ b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
@@ -20,8 +20,4 @@ enum periph_id {
PERIPH_ID_QUADSPI = 92,
};
-enum periph_clock {
- TIMER2_CLOCK_CFG,
-};
-
#endif /* __ASM_ARM_ARCH_PERIPH_H */
diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig
index f79b1a2c700e..13532843fbc8 100644
--- a/arch/arm/mach-stm32/Kconfig
+++ b/arch/arm/mach-stm32/Kconfig
@@ -13,6 +13,8 @@ config STM32F4
select STM32_RCC
select STM32_RESET
select STM32_SERIAL
+ select STM32_TIMER
+ select TIMER
config STM32F7
bool "stm32f7 family"
@@ -27,6 +29,8 @@ config STM32F7
select STM32_RCC
select STM32_RESET
select STM32_SERIAL
+ select STM32_TIMER
+ select TIMER
select SUPPORT_SPL
select SPL
select SPL_BOARD_INIT
@@ -46,6 +50,7 @@ config STM32F7
select SPL_RAM
select SPL_SERIAL_SUPPORT
select SPL_SYS_MALLOC_SIMPLE
+ select SPL_TIMER
select SPL_XIP_SUPPORT
config STM32H7
@@ -62,7 +67,9 @@ config STM32H7
select STM32_RCC
select STM32_RESET
select STM32_SERIAL
+ select STM32_TIMER
select SYSCON
+ select TIMER
source "arch/arm/mach-stm32/stm32f4/Kconfig"
source "arch/arm/mach-stm32/stm32f7/Kconfig"
diff --git a/arch/arm/mach-stm32/Makefile b/arch/arm/mach-stm32/Makefile
index c2806af69b04..d0f2a96b9fff 100644
--- a/arch/arm/mach-stm32/Makefile
+++ b/arch/arm/mach-stm32/Makefile
@@ -5,5 +5,3 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += soc.o
-obj-$(CONFIG_STM32F4) += stm32f4/
-obj-$(CONFIG_STM32F7) += stm32f7/
diff --git a/arch/arm/mach-stm32/stm32f4/Makefile b/arch/arm/mach-stm32/stm32f4/Makefile
deleted file mode 100644
index 86c81bbe445b..000000000000
--- a/arch/arm/mach-stm32/stm32f4/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-#
-# (C) Copyright 2015
-# Kamil Lulko, <kamil.lulko at gmail.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += timer.o
diff --git a/arch/arm/mach-stm32/stm32f4/timer.c b/arch/arm/mach-stm32/stm32f4/timer.c
deleted file mode 100644
index 00b1d4abdac5..000000000000
--- a/arch/arm/mach-stm32/stm32f4/timer.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko at gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <stm32_rcc.h>
-#include <asm/io.h>
-#include <asm/armv7m.h>
-#include <asm/arch/stm32.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define STM32_TIM2_BASE (STM32_APB1PERIPH_BASE + 0x0000)
-
-#define RCC_APB1ENR_TIM2EN (1 << 0)
-
-struct stm32_tim2_5 {
- u32 cr1;
- u32 cr2;
- u32 smcr;
- u32 dier;
- u32 sr;
- u32 egr;
- u32 ccmr1;
- u32 ccmr2;
- u32 ccer;
- u32 cnt;
- u32 psc;
- u32 arr;
- u32 reserved1;
- u32 ccr1;
- u32 ccr2;
- u32 ccr3;
- u32 ccr4;
- u32 reserved2;
- u32 dcr;
- u32 dmar;
- u32 or;
-};
-
-#define TIM_CR1_CEN (1 << 0)
-
-#define TIM_EGR_UG (1 << 0)
-
-int timer_init(void)
-{
- struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
-
- setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_TIM2EN);
-
- writel(((CONFIG_SYS_CLK_FREQ / 2) / CONFIG_SYS_HZ_CLOCK) - 1,
- &tim->psc);
-
- writel(0xFFFFFFFF, &tim->arr);
- writel(TIM_CR1_CEN, &tim->cr1);
- setbits_le32(&tim->egr, TIM_EGR_UG);
-
- gd->arch.tbl = 0;
- gd->arch.tbu = 0;
- gd->arch.lastinc = 0;
-
- return 0;
-}
-
-ulong get_timer(ulong base)
-{
- return (get_ticks() / (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)) - base;
-}
-
-unsigned long long get_ticks(void)
-{
- struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
- u32 now;
-
- now = readl(&tim->cnt);
-
- if (now >= gd->arch.lastinc)
- gd->arch.tbl += (now - gd->arch.lastinc);
- else
- gd->arch.tbl += (0xFFFFFFFF - gd->arch.lastinc) + now;
-
- gd->arch.lastinc = now;
-
- return gd->arch.tbl;
-}
-
-void reset_timer(void)
-{
- struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
-
- gd->arch.lastinc = readl(&tim->cnt);
- gd->arch.tbl = 0;
-}
-
-/* delay x useconds */
-void __udelay(ulong usec)
-{
- unsigned long long start;
-
- start = get_ticks(); /* get current timestamp */
- while ((get_ticks() - start) < usec)
- ; /* loop till time has passed */
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk(void)
-{
- return CONFIG_SYS_HZ_CLOCK;
-}
diff --git a/arch/arm/mach-stm32/stm32f7/Makefile b/arch/arm/mach-stm32/stm32f7/Makefile
deleted file mode 100644
index 8132c1323403..000000000000
--- a/arch/arm/mach-stm32/stm32f7/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# Copyright (C) 2016, STMicroelectronics - All Rights Reserved
-# Author(s): Vikas Manocha, <vikas.manocha at st.com> for STMicroelectronics.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += timer.o
diff --git a/arch/arm/mach-stm32/stm32f7/timer.c b/arch/arm/mach-stm32/stm32f7/timer.c
deleted file mode 100644
index 69d37a7c708c..000000000000
--- a/arch/arm/mach-stm32/stm32f7/timer.c
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
- * Author(s): Vikas Manocha, <vikas.manocha at st.com> for STMicroelectronics.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <stm32_rcc.h>
-#include <asm/io.h>
-#include <asm/arch/stm32.h>
-#include <asm/arch/stm32_defs.h>
-#include <asm/arch/gpt.h>
-
-#define READ_TIMER() (readl(&gpt1_regs_ptr->cnt) & GPT_FREE_RUNNING)
-#define GPT_RESOLUTION (CONFIG_SYS_HZ_CLOCK/CONFIG_STM32_HZ)
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define timestamp gd->arch.tbl
-#define lastdec gd->arch.lastinc
-
-int timer_init(void)
-{
- /* Timer2 clock configuration */
- clock_setup(TIMER2_CLOCK_CFG);
- /* Stop the timer */
- writel(readl(&gpt1_regs_ptr->cr1) & ~GPT_CR1_CEN, &gpt1_regs_ptr->cr1);
-
- writel((CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ_CLOCK) - 1,
- &gpt1_regs_ptr->psc);
-
- /* Configure timer for auto-reload */
- writel(readl(&gpt1_regs_ptr->cr1) | GPT_MODE_AUTO_RELOAD,
- &gpt1_regs_ptr->cr1);
-
- /* load value for free running */
- writel(GPT_FREE_RUNNING, &gpt1_regs_ptr->arr);
-
- /* start timer */
- writel(readl(&gpt1_regs_ptr->cr1) | GPT_CR1_CEN, &gpt1_regs_ptr->cr1);
-
- writel(readl(&gpt1_regs_ptr->egr) | TIM_EGR_UG, &gpt1_regs_ptr->egr);
-
- /* Reset the timer */
- lastdec = READ_TIMER();
- timestamp = 0;
-
- return 0;
-}
-
-/*
- * timer without interrupts
- */
-ulong get_timer(ulong base)
-{
- return (get_timer_masked() / GPT_RESOLUTION) - base;
-}
-
-void __udelay(unsigned long usec)
-{
- ulong tmo;
- ulong start = get_timer_masked();
- ulong tenudelcnt = CONFIG_SYS_HZ_CLOCK / (1000 * 100);
- ulong rndoff;
-
- rndoff = (usec % 10) ? 1 : 0;
-
- /* tenudelcnt timer tick gives 10 microsecconds delay */
- tmo = ((usec / 10) + rndoff) * tenudelcnt;
-
- while ((ulong) (get_timer_masked() - start) < tmo)
- ;
-}
-
-ulong get_timer_masked(void)
-{
- ulong now = READ_TIMER();
-
- if (now >= lastdec) {
- /* normal mode */
- timestamp += now - lastdec;
- } else {
- /* we have an overflow ... */
- timestamp += now + GPT_FREE_RUNNING - lastdec;
- }
- lastdec = now;
-
- return timestamp;
-}
-
-void udelay_masked(unsigned long usec)
-{
- return udelay(usec);
-}
-
-/*
- * This function is derived from PowerPC code (read timebase as long long).
- * On ARM it just returns the timer value.
- */
-unsigned long long get_ticks(void)
-{
- return get_timer(0);
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk(void)
-{
- return CONFIG_STM32_HZ;
-}
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index 8da70281f976..ec39468fb8a2 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -14,7 +14,6 @@
#include <asm/arch/stm32.h>
#include <asm/arch/gpio.h>
#include <asm/arch/stm32_periph.h>
-#include <asm/arch/stm32_defs.h>
#include <asm/arch/syscfg.h>
#include <asm/gpio.h>
diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c
index bde31607cfe9..f1f02995d9c0 100644
--- a/drivers/clk/clk_stm32f.c
+++ b/drivers/clk/clk_stm32f.c
@@ -87,10 +87,6 @@
#define RCC_APB2ENR_SYSCFGEN BIT(14)
#define RCC_APB2ENR_SAI1EN BIT(22)
-enum periph_clock {
- TIMER2_CLOCK_CFG,
-};
-
static const struct stm32_clk_info stm32f4_clk_info = {
/* 180 MHz */
.sys_pll_psc = {
@@ -438,17 +434,6 @@ static int stm32_clk_enable(struct clk *clk)
return 0;
}
-void clock_setup(int peripheral)
-{
- switch (peripheral) {
- case TIMER2_CLOCK_CFG:
- setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_TIM2EN);
- break;
- default:
- break;
- }
-}
-
static int stm32_clk_probe(struct udevice *dev)
{
struct ofnode_phandle_args args;
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index ef2b64ec5fbb..558708a4a7b0 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -16,7 +16,6 @@
#include <dm.h>
#include <errno.h>
#include <asm/arch/stm32.h>
-#include <asm/arch/stm32_defs.h>
#include <clk.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/include/configs/stm32h743-disco.h b/include/configs/stm32h743-disco.h
index 1494203e83b2..f81bd05cc915 100644
--- a/include/configs/stm32h743-disco.h
+++ b/include/configs/stm32h743-disco.h
@@ -25,8 +25,7 @@
#define CONFIG_ENV_SIZE (8 << 10)
-#define CONFIG_SYS_ARCH_TIMER
-#define CONFIG_SYS_HZ_CLOCK 250000000
+#define CONFIG_SYS_HZ_CLOCK 1000000
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
diff --git a/include/configs/stm32h743-eval.h b/include/configs/stm32h743-eval.h
index 1494203e83b2..f81bd05cc915 100644
--- a/include/configs/stm32h743-eval.h
+++ b/include/configs/stm32h743-eval.h
@@ -25,8 +25,7 @@
#define CONFIG_ENV_SIZE (8 << 10)
-#define CONFIG_SYS_ARCH_TIMER
-#define CONFIG_SYS_HZ_CLOCK 250000000
+#define CONFIG_SYS_HZ_CLOCK 1000000
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
--
1.9.1
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