[U-Boot] [PATCHv1] mx53ppd: Change UART clock divider for high baudrate

[Sebastian Reichel]

From: Rick Bronson <rick at efn.org>

Allow higher UART baud rates for communications to ACHC at 13.5 MBaud
Done in u-boot since it changes a divider common to all UARTs, including
the console. If it were done in Linux we would get garbled characters
during the handoff from u-boot to the kernel.

Signed-off-by: Sebastian Reichel <sebastian.reichel at collabora.co.uk>
---
 arch/arm/mach-imx/mx5/lowlevel_init.S | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/mach-imx/mx5/lowlevel_init.S b/arch/arm/mach-imx/mx5/lowlevel_init.S
index f5bc6728b7c2..ee4c3afd2fed 100644
--- a/arch/arm/mach-imx/mx5/lowlevel_init.S
+++ b/arch/arm/mach-imx/mx5/lowlevel_init.S
@@ -319,11 +319,13 @@ setup_pll_func:
 	ldr r1, =0x00016154
 	str r1, [r0, #CLKCTL_CBCMR]
 
+#if !defined(CONFIG_TARGET_MX53PPD)
 	/*change uart clk parent to pll2*/
 	ldr r1, [r0, #CLKCTL_CSCMR1]
 	and r1, r1, #0xfcffffff
 	orr r1, r1, #0x01000000
 	str r1, [r0, #CLKCTL_CSCMR1]
+#endif
 
 	/* make sure change is effective */
 1:      ldr r1, [r0, #CLKCTL_CDHIPR]
@@ -350,7 +352,9 @@ setup_pll_func:
 	/* make uart div=6 */
 	ldr r1, [r0, #CLKCTL_CSCDR1]
 	and r1, r1, #0xffffffc0
+#if !defined(CONFIG_TARGET_MX53PPD)
 	orr r1, r1, #0x0a
+#endif
 	str r1, [r0, #CLKCTL_CSCDR1]
 
 	/* Restore the default values in the Gate registers */
-- 
2.15.1