[U-Boot] [UBOOT PATCH v2 2/2] spi: Added Kconfig support for SYS_ZYNQ_SPI_WAIT and XILINX_SPI_IDLE_VAL

[Vipul Kumar]

This patch added Kconfig support for CONFIG_SYS_ZYNQ_SPI_WAIT
and CONFIG_XILINX_SPI_IDLE_VAL and set default value.

Signed-off-by: Vipul Kumar <vipulk at xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur at xilinx.com>
---
- Changes in V2:
- Added depends on XILINX_SPI
- Branch: u-boot-microblaze/kconfig
---
 drivers/spi/Kconfig      | 14 ++++++++++++++
 drivers/spi/xilinx_spi.c |  4 ----
 drivers/spi/zynq_spi.c   |  3 ---
 3 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 94f6d7d..d8e17cd 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -211,6 +211,20 @@ config SYS_ZYNQ_QSPI_WAIT
        help
          Define default Zynq QSPI wait time in milliseconds.

+config SYS_ZYNQ_SPI_WAIT
+       int "Define Zynq SPI wait time in ms"
+       depends on XILINX_SPI
+       default 10
+       help
+         Define default Zynq SPI wait time in milliseconds.
+
+config XILINX_SPI_IDLE_VAL
+       hex "Define the default SPI idle value"
+       depends on XILINX_SPI
+       default 0xFFFFFFFF
+       help
+         Set the default SPI idle value.
+
 endif # if DM_SPI

 config SOFT_SPI
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index a951a77..9781ea9 100644
--- a/drivers/spi/xilinx_spi.c
+++ b/drivers/spi/xilinx_spi.c
@@ -74,10 +74,6 @@
                                SPICR_SPE)
 #define XILSPI_SPICR_DFLT_OFF  (SPICR_MASTER_INHIBIT | SPICR_MANUAL_SS)

-#ifndef CONFIG_XILINX_SPI_IDLE_VAL
-#define CONFIG_XILINX_SPI_IDLE_VAL     GENMASK(7, 0)
-#endif
-
 #ifndef CONFIG_SYS_XILINX_SPI_LIST
 #define CONFIG_SYS_XILINX_SPI_LIST     { CONFIG_SYS_SPI_BASE }
 #endif
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
index ed2b8cb..be8f525 100644
--- a/drivers/spi/zynq_spi.c
+++ b/drivers/spi/zynq_spi.c
@@ -33,9 +33,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define ZYNQ_SPI_CR_SS_SHIFT           10      /* Slave select shift */

 #define ZYNQ_SPI_FIFO_DEPTH            128
-#ifndef CONFIG_SYS_ZYNQ_SPI_WAIT
-#define CONFIG_SYS_ZYNQ_SPI_WAIT       (CONFIG_SYS_HZ/100)     /* 10 ms */
-#endif

 /* zynq spi register set */
 struct zynq_spi_regs {
--
2.7.4

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