[U-Boot] rockchip: clk: rk3188: update dpll settings to make EMAC work

[Philipp Tomsich]

> The patch set dpll settings for 300MHz to values used by binary
> blob[1]. With new values dpll still generate 300MHz clock, but
> EMAC work. Probably with new values dpll generate more stable clock.
> 
> dpll on rk3188 provide clocks to DDR and EMAC. With current
> dpll settings EMAC doesn't work on radxa rock. EMAC sends packets
> to network, but it doesn't receive anything. ifconfig shows a lot
> of framing errors.
> 
> [1] https://github.com/linux-rockchip/u-boot-rockchip/blob/u-boot-rk3288/
>     tools/rk_tools/3188_LPDDR2_300MHz_DDR3_300MHz_20130830.bin
> 
> Signed-off-by: Alexander Kochetkov <al.kochet at gmail.com>
> ---
>  drivers/clk/rockchip/clk_rk3188.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 

Acked-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>