[U-Boot] [PATCH v3 11/20] sunxi: spl: deassert the NAND controller reset line

[Miquel Raynal]

Ensure the NAND controller reset line is deasserted before use.

Signed-off-by: Miquel Raynal <miquel.raynal at bootlin.com>
---
 board/sunxi/board.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 8891961dcc..b8f58fe133 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -286,6 +286,10 @@ static void nand_clock_setup(void)
 		(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
 
 	setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0));
+#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I || \
+    defined CONFIG_MACH_SUN9I || defined CONFIG_MACH_SUN50I
+	setbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_NAND0));
+#endif
 #ifdef CONFIG_MACH_SUN9I
 	setbits_le32(&ccm->ahb_gate1, (1 << AHB_GATE_OFFSET_DMA));
 #else
-- 
2.14.1