[U-Boot] [PATCH 2/2] arm: zynq: add support for the zybo z7 board
Michal Simek
monstr at monstr.eu
Fri Jul 20 07:08:56 UTC 2018
On 13.7.2018 17:44, Luis Araneda wrote:
> The board is manufactured by Digilent
> Main features:
> - Soc: XC7Z010 (Z7-10) or XC7Z020 (Z7-20)
> - RAM: 1 GB DDR3L
> - FLASH: 16 MB QSPI
> - 1 Gbps Ethernet
> - USB 2.0
> - microSD slot
> - Pcam camera connector
> - HDMI Tx and Rx
> - Audio codec: stereo out, stereo in, mic
> - 5 (Z7-10) or 6 (Z7-20) Pmod ports
> - 6 push-buttons, 4 switches, 5 LEDs
> - 1 (Z7-10) or 2 (Z7-20) RGB LEDs
>
> The device-tree was taken from Linux with some minor corrections
>
> Signed-off-by: Luis Araneda <luaraneda at gmail.com>
> ---
> arch/arm/dts/Makefile | 3 +-
> arch/arm/dts/zynq-zybo-z7.dts | 91 ++++++++++++++++++++++++++++++++++
> configs/zynq_zybo_z7_defconfig | 68 +++++++++++++++++++++++++
> 3 files changed, 161 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/dts/zynq-zybo-z7.dts
> create mode 100644 configs/zynq_zybo_z7_defconfig
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 946023093d..cee301a4c6 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -145,7 +145,8 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
> zynq-zc770-xm013.dtb \
> zynq-zed.dtb \
> zynq-zturn.dtb \
> - zynq-zybo.dtb
> + zynq-zybo.dtb \
> + zynq-zybo-z7.dtb
> dtb-$(CONFIG_ARCH_ZYNQMP) += \
> zynqmp-mini-emmc0.dtb \
> zynqmp-mini-emmc1.dtb \
> diff --git a/arch/arm/dts/zynq-zybo-z7.dts b/arch/arm/dts/zynq-zybo-z7.dts
> new file mode 100644
> index 0000000000..ad9264e9b1
> --- /dev/null
> +++ b/arch/arm/dts/zynq-zybo-z7.dts
> @@ -0,0 +1,91 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2011 - 2015 Xilinx
> + * Copyright (C) 2012 National Instruments Corp.
> + */
> +/dts-v1/;
> +#include "zynq-7000.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +
> +/ {
> + model = "Digilent Zybo Z7 board";
> + compatible = "digilent,zynq-zybo-z7", "xlnx,zynq-7000";
> +
> + aliases {
> + ethernet0 = &gem0;
> + serial0 = &uart1;
> + spi0 = &qspi;
> + i2c0 = &i2c0;
> + i2c1 = &i2c1;
> + mmc0 = &sdhci0;
> + };
> +
> + memory at 0 {
> + device_type = "memory";
> + reg = <0x0 0x40000000>;
> + };
> +
> + chosen {
> + bootargs = "";
> + stdout-path = "serial0:115200n8";
> + };
> +
> + gpio-leds {
> + compatible = "gpio-leds";
> +
> + ld4 {
> + label = "zynq-zybo-z7:green:ld4";
> + gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +
> + usb_phy0: phy0 {
> + #phy-cells = <0>;
> + compatible = "usb-nop-xceiv";
> + reset-gpios = <&gpio0 46 GPIO_ACTIVE_LOW>;
> + };
> +};
> +
> +&clkc {
> + ps-clk-frequency = <33333333>;
> +};
> +
> +&gem0 {
> + status = "okay";
> + phy-mode = "rgmii-id";
> + phy-handle = <ðernet_phy>;
> +
> + ethernet_phy: ethernet-phy at 0 {
> + reg = <0>;
> + device_type = "ethernet-phy";
> + };
> +};
> +
> +&i2c0 {
> + status = "okay";
> +};
> +
> +&i2c1 {
> + status = "okay";
> +};
> +
> +&qspi {
> + u-boot,dm-pre-reloc;
> + status = "okay";
> +};
> +
> +&sdhci0 {
> + u-boot,dm-pre-reloc;
> + status = "okay";
> +};
> +
> +&uart1 {
> + u-boot,dm-pre-reloc;
> + status = "okay";
> +};
> +
> +&usb0 {
> + status = "okay";
> + dr_mode = "host";
> + usb-phy = <&usb_phy0>;
> +};
> diff --git a/configs/zynq_zybo_z7_defconfig b/configs/zynq_zybo_z7_defconfig
> new file mode 100644
> index 0000000000..068a5a96e2
> --- /dev/null
> +++ b/configs/zynq_zybo_z7_defconfig
> @@ -0,0 +1,68 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_ZYNQ=y
> +CONFIG_SYS_TEXT_BASE=0x4000000
> +CONFIG_SPL=y
> +CONFIG_DEBUG_UART_BASE=0xe0001000
> +CONFIG_DEBUG_UART_CLOCK=50000000
> +CONFIG_SPL_STACK_R_ADDR=0x200000
> +CONFIG_DEFAULT_DEVICE_TREE="zynq-zybo-z7"
> +CONFIG_DEBUG_UART=y
> +CONFIG_DISTRO_DEFAULTS=y
> +CONFIG_FIT=y
> +CONFIG_FIT_SIGNATURE=y
> +CONFIG_FIT_VERBOSE=y
> +CONFIG_IMAGE_FORMAT_LEGACY=y
> +CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
> +CONFIG_SPL_STACK_R=y
> +CONFIG_SPL_OS_BOOT=y
> +CONFIG_SPL_SPI_LOAD=y
> +CONFIG_SYS_PROMPT="Zynq> "
> +CONFIG_CMD_THOR_DOWNLOAD=y
> +CONFIG_CMD_DFU=y
> +# CONFIG_CMD_FLASH is not set
> +CONFIG_CMD_FPGA_LOADBP=y
> +CONFIG_CMD_FPGA_LOADFS=y
> +CONFIG_CMD_FPGA_LOADMK=y
> +CONFIG_CMD_FPGA_LOADP=y
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_I2C=y
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_SF=y
> +CONFIG_CMD_USB=y
> +# CONFIG_CMD_SETEXPR is not set
> +CONFIG_CMD_TFTPPUT=y
> +CONFIG_CMD_CACHE=y
> +CONFIG_CMD_EXT4_WRITE=y
> +CONFIG_ENV_IS_IN_SPI_FLASH=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
> +CONFIG_DFU_MMC=y
> +CONFIG_DFU_RAM=y
> +CONFIG_FPGA_XILINX=y
> +CONFIG_FPGA_ZYNQPL=y
> +CONFIG_DM_GPIO=y
> +CONFIG_DM_I2C=y
> +CONFIG_SYS_I2C_CADENCE=y
> +CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_ZYNQ=y
> +CONFIG_SPI_FLASH=y
> +CONFIG_SPI_FLASH_BAR=y
> +CONFIG_SPI_FLASH_SPANSION=y
> +CONFIG_PHY_REALTEK=y
> +CONFIG_ZYNQ_GEM=y
> +CONFIG_DEBUG_UART_ZYNQ=y
> +CONFIG_ZYNQ_SERIAL=y
> +CONFIG_ZYNQ_QSPI=y
> +CONFIG_USB=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_ULPI_VIEWPORT=y
> +CONFIG_USB_ULPI=y
> +CONFIG_USB_STORAGE=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
> +CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
> +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
> +CONFIG_CI_UDC=y
> +CONFIG_USB_GADGET_DOWNLOAD=y
> +CONFIG_USB_FUNCTION_THOR=y
> +CONFIG_DISPLAY=y
Not sure if make sense to enable this CONFIG_DISPLAY but the rest is fine.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs
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