[U-Boot] [PATCH 06/12] net: phy: ti: Recover from "port mirroring" N/A MODE4

[Joe Hershberger]

On Thu, Jun 14, 2018 at 4:48 AM, Janine Hagemann <j.hagemann at phytec.de> wrote:
> The DP83867 when not properly bootstrapped - especially with LED_0 pin -
> can enter N/A MODE4 for "port mirroring" feature.
>
> To provide normal operation of the PHY, one needs not only to explicitly
> disable the port mirroring feature, but as well stop some IC internal
> testing (which disables RGMII communication).
>
> To do that the STRAP_STS1 (0x006E) register must be read and RESERVED bit
> 11 examined. When it is set, the another RESERVED bit (11) at PHYCR
> (0x0010) register must be clear to disable testing mode and enable RGMII
> communication.
>
> Thorough explanation of the problem can be found at following e2e thread:
> "DP83867IR: Problem with RESERVED bits in PHY Control Register (PHYCR) -
> Linux driver"
>
> https://e2e.ti.com/support/interface/ethernet/f/903/p/571313/2096954#2096954
>
> Based on commit 'ac6e058b75be71208e98a5808453aae9a17be480' of mainline linux
> kernel.

Same comment about commit reference format.

>
> Signed-off-by: Janine Hagemann <j.hagemann at phytec.de>

Otherwise,
Acked-by: Joe Hershberger <joe.hershberger at ni.com>