[U-Boot] imx: get_ticks in syscounter.c get miscompiled by GCC 6

[Yasushi SHOJI]

Hi,

It seems to me that both GCC 6.3 and 6.4 mis-compiles
arch/arm/mach-imx/syscounter.c.

I'm attaching two files, bad.txt is the original syscounter.c and
good.txt is the one
with the following patch.

diff --git a/arch/arm/mach-imx/syscounter.c b/arch/arm/mach-imx/syscounter.c
index 9290918dca..30ed0109a2 100644
--- a/arch/arm/mach-imx/syscounter.c
+++ b/arch/arm/mach-imx/syscounter.c
@@ -82,7 +82,7 @@ unsigned long long get_ticks(void)
 {
        unsigned long long now;

-       asm("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));
+       asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));

        gd->arch.tbl = (unsigned long)(now & 0xffffffff);
        gd->arch.tbu = (unsigned long)(now >> 32);


The target code is the while loop in the __udelay.
void __udelay(unsigned long usec)
{
    unsigned long long tmp;
    ulong tmo;

    tmo = us_to_tick(usec);
    tmp = get_ticks() + tmo; /* get current timestamp */

    while (get_ticks() < tmp) /* loop till event */
        /*NOP*/;
}


Here is the mis compiled asm from the above code (whole function is
attached as bad.txt)

  88: 428b      cmp r3, r1
  8a: f8ce 20a4 str.w r2, [lr, #164] ; 0xa4
  8e: bf08      it eq
  90: 4282      cmpeq r2, r0
  92: f8ce 30a0 str.w r3, [lr, #160] ; 0xa0
  96: d3f7      bcc.n 88 <__udelay+0x88>

Note that the last bcc.n to 88 and we don't see mrrc.

This seems to be that both get_ticks() are inlined and "mrrc"s are
duplicated in the
__udealy() and GCC sees it as an opportunity to optimize out.

GCC 5 and 8 seems to work fine.  Unfortunately I don't have GCC 7 ATM so no
idea how it compiles.

Does anyone see this?
-- 
            yashi
-------------- next part --------------
Disassembly of section .text.__udelay:

00000000 <__udelay>:
   0:	e92d 4cf0 	stmdb	sp!, {r4, r5, r6, r7, sl, fp, lr}
   4:	ee1e 1f10 	mrc	15, 0, r1, cr14, cr0, {0}
   8:	f244 243f 	movw	r4, #16959	; 0x423f
   c:	f2c0 040f 	movt	r4, #15
  10:	2500      	movs	r5, #0
  12:	f243 4edb 	movw	lr, #13531	; 0x34db
  16:	fbe1 4500 	umlal	r4, r5, r1, r0
  1a:	f2cd 7eb6 	movt	lr, #55222	; 0xd7b6
  1e:	f64d 6c82 	movw	ip, #56962	; 0xde82
  22:	f2c4 3c1b 	movt	ip, #17179	; 0x431b
  26:	2300      	movs	r3, #0
  28:	fba4 670e 	umull	r6, r7, r4, lr
  2c:	4629      	mov	r1, r5
  2e:	2500      	movs	r5, #0
  30:	2600      	movs	r6, #0
  32:	fba4 ab0c 	umull	sl, fp, r4, ip
  36:	fb0e 7205 	mla	r2, lr, r5, r7
  3a:	fb0c bb05 	mla	fp, ip, r5, fp
  3e:	2500      	movs	r5, #0
  40:	fbee 2301 	umlal	r2, r3, lr, r1
  44:	46ce      	mov	lr, r9
  46:	eb1a 0a02 	adds.w	sl, sl, r2
  4a:	eb4b 0b03 	adc.w	fp, fp, r3
  4e:	459b      	cmp	fp, r3
  50:	f64d 6382 	movw	r3, #56962	; 0xde82
  54:	f2c4 331b 	movt	r3, #17179	; 0x431b
  58:	465c      	mov	r4, fp
  5a:	bf08      	it	eq
  5c:	4592      	cmpeq	sl, r2
  5e:	fbe3 4501 	umlal	r4, r5, r3, r1
  62:	ec51 0f0e 	mrrc	15, 0, r0, r1, cr14
  66:	bf2c      	ite	cs
  68:	2700      	movcs	r7, #0
  6a:	2701      	movcc	r7, #1
  6c:	f8c9 00a4 	str.w	r0, [r9, #164]	; 0xa4
  70:	19a4      	adds	r4, r4, r6
  72:	4602      	mov	r2, r0
  74:	417d      	adcs	r5, r7
  76:	f8c9 10a0 	str.w	r1, [r9, #160]	; 0xa0
  7a:	0ca4      	lsrs	r4, r4, #18
  7c:	460b      	mov	r3, r1
  7e:	ea44 3485 	orr.w	r4, r4, r5, lsl #14
  82:	1900      	adds	r0, r0, r4
  84:	f141 0100 	adc.w	r1, r1, #0
  88:	428b      	cmp	r3, r1
  8a:	f8ce 20a4 	str.w	r2, [lr, #164]	; 0xa4
  8e:	bf08      	it	eq
  90:	4282      	cmpeq	r2, r0
  92:	f8ce 30a0 	str.w	r3, [lr, #160]	; 0xa0
  96:	d3f7      	bcc.n	88 <__udelay+0x88>
  98:	e8bd 8cf0 	ldmia.w	sp!, {r4, r5, r6, r7, sl, fp, pc}
-------------- next part --------------
Disassembly of section .text.__udelay:

00000000 <__udelay>:
   0:	e92d 4cf0 	stmdb	sp!, {r4, r5, r6, r7, sl, fp, lr}
   4:	ee1e 1f10 	mrc	15, 0, r1, cr14, cr0, {0}
   8:	f244 243f 	movw	r4, #16959	; 0x423f
   c:	f2c0 040f 	movt	r4, #15
  10:	2500      	movs	r5, #0
  12:	f243 4edb 	movw	lr, #13531	; 0x34db
  16:	fbe1 4500 	umlal	r4, r5, r1, r0
  1a:	f2cd 7eb6 	movt	lr, #55222	; 0xd7b6
  1e:	f64d 6c82 	movw	ip, #56962	; 0xde82
  22:	f2c4 3c1b 	movt	ip, #17179	; 0x431b
  26:	2300      	movs	r3, #0
  28:	f64d 6082 	movw	r0, #56962	; 0xde82
  2c:	f2c4 301b 	movt	r0, #17179	; 0x431b
  30:	fba4 670e 	umull	r6, r7, r4, lr
  34:	4629      	mov	r1, r5
  36:	2500      	movs	r5, #0
  38:	fba4 ab0c 	umull	sl, fp, r4, ip
  3c:	fb0e 7205 	mla	r2, lr, r5, r7
  40:	fb0c bb05 	mla	fp, ip, r5, fp
  44:	2500      	movs	r5, #0
  46:	fbee 2301 	umlal	r2, r3, lr, r1
  4a:	eb1a 0a02 	adds.w	sl, sl, r2
  4e:	eb4b 0b03 	adc.w	fp, fp, r3
  52:	459b      	cmp	fp, r3
  54:	465c      	mov	r4, fp
  56:	bf08      	it	eq
  58:	4592      	cmpeq	sl, r2
  5a:	fbe0 4501 	umlal	r4, r5, r0, r1
  5e:	f04f 0200 	mov.w	r2, #0
  62:	bf2c      	ite	cs
  64:	2300      	movcs	r3, #0
  66:	2301      	movcc	r3, #1
  68:	4620      	mov	r0, r4
  6a:	4629      	mov	r1, r5
  6c:	ec55 4f0e 	mrrc	15, 0, r4, r5, cr14
  70:	1812      	adds	r2, r2, r0
  72:	f8c9 40a4 	str.w	r4, [r9, #164]	; 0xa4
  76:	414b      	adcs	r3, r1
  78:	f8c9 50a0 	str.w	r5, [r9, #160]	; 0xa0
  7c:	0c92      	lsrs	r2, r2, #18
  7e:	4649      	mov	r1, r9
  80:	ea42 3283 	orr.w	r2, r2, r3, lsl #14
  84:	18a4      	adds	r4, r4, r2
  86:	f145 0500 	adc.w	r5, r5, #0
  8a:	ec53 2f0e 	mrrc	15, 0, r2, r3, cr14
  8e:	42ab      	cmp	r3, r5
  90:	f8c1 20a4 	str.w	r2, [r1, #164]	; 0xa4
  94:	bf08      	it	eq
  96:	42a2      	cmpeq	r2, r4
  98:	f8c1 30a0 	str.w	r3, [r1, #160]	; 0xa0
  9c:	d3f5      	bcc.n	8a <__udelay+0x8a>
  9e:	e8bd 8cf0 	ldmia.w	sp!, {r4, r5, r6, r7, sl, fp, pc}
  a2:	bf00      	nop