[U-Boot] [PATCH 1/3] arm: socfpga: stratix10: Add base address map for Statix10 SoC
Marek Vasut
marex at denx.de
Sat Mar 17 03:48:39 UTC 2018
On 03/09/2018 04:39 AM, Dinh Nguyen wrote:
> From: Chin Liang See <chin.liang.see at intel.com>
>
> Add the base address map for Statix10 SoC
Stratix ...
> Signed-off-by: Chin Liang See <chin.liang.see at intel.com>
> Signed-off-by: Dinh Nguyen <dinguyen at kernel.org>
> ---
> v2: removed addresses that can be part of the fdt
> ---
> arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 33 ++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
> create mode 100644 arch/arm/mach-socfpga/include/mach/base_addr_s10.h
>
> diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
> new file mode 100644
> index 0000000..7052804
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
> @@ -0,0 +1,33 @@
> +/*
> + * Copyright (C) 2016-2017 Intel Corporation <www.intel.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0
> + */
> +
> +#ifndef _SOCFPGA_S10_BASE_HARDWARE_H_
> +#define _SOCFPGA_S10_BASE_HARDWARE_H_
> +
> +#define SOCFPGA_SDR_SCHEDULER_ADDRESS 0xf8000400
> +#define SOCFPGA_HMC_MMR_IO48_ADDRESS 0xf8010000
> +#define SOCFPGA_SDR_ADDRESS 0xf8011000
> +#define SOCFPGA_SMMU_ADDRESS 0xfa000000
> +#define SOCFPGA_MAILBOX_ADDRESS 0xffa30000
> +#define SOCFPGA_UART0_ADDRESS 0xffc02000
> +#define SOCFPGA_UART1_ADDRESS 0xffc02100
> +#define SOCFPGA_SPTIMER0_ADDRESS 0xffc03000
> +#define SOCFPGA_SPTIMER1_ADDRESS 0xffc03100
> +#define SOCFPGA_SYSTIMER0_ADDRESS 0xffd00000
> +#define SOCFPGA_SYSTIMER1_ADDRESS 0xffd00100
> +#define SOCFPGA_GTIMER_SEC_ADDRESS 0xffd01000
> +#define SOCFPGA_GTIMER_NSEC_ADDRESS 0xffd02000
> +#define SOCFPGA_CLKMGR_ADDRESS 0xffd10000
> +#define SOCFPGA_RSTMGR_ADDRESS 0xffd11000
> +#define SOCFPGA_SYSMGR_ADDRESS 0xffd12000
> +#define SOCFPGA_PINMUX_DEDICATED_IO_ADDRESS 0xffd13000
> +#define SOCFPGA_DMANONSECURE_ADDRESS 0xffda0000
> +#define SOCFPGA_DMASECURE_ADDRESS 0xffda1000
> +#define SOCFPGA_OCRAM_ADDRESS 0xffe00000
> +#define GICD_BASE 0xfffc1000
> +#define GICC_BASE 0xfffc2000
> +
> +#endif /* _SOCFPGA_S10_BASE_HARDWARE_H_ */
>
--
Best regards,
Marek Vasut
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