[U-Boot] [PATCH] davinci: omapl138_lcdk: fix PLL0 frequency

[Mike Looijmans]

On 16-03-18 16:56, David Lechner wrote:
> On 03/16/2018 01:26 AM, Mike Looijmans wrote:
>>
>> On 15-03-18 02:36, David Lechner wrote:
>>> commit 1601dd97edc6 ("davinci: omapl138_lcdk: increase PLL0 frequency")
>>> changed the PLL0 frequency to 456MHz, which is needed for the LCDC IP
>>> block. However, in doing so, it caused the PLLOUT clock to be outside
>>> of the allowable specifications given in the OMAP-L138 data sheet. (It
>>> says PLLOUT must be 600MHz max). It also uses a PLLM value outside of
>>> the range given in the TRM (it says PLLM must in the range 0 to 0x1f).
>>>
>>> So here is what we have currently:
>>>
>>> PLLOUT = 24 / (0 + 1) * (37 + 1) = 912MHz (out of spec)
>>>           ^     ^         ^
>>>         CLKIN PREDIV    PLLM (out of spec)
>>>
>>> input to PLLDIVn = 912 / (1 + 1) = 456MHz (desired result)
>>>                      ^     ^
>>>                   PLLOUT POSTDIV
>>>
>>> This changes the PLLM value to 18 and the POSTDIV value to 0 so that
>>> PLLOUT is now within specification but we still get the desired
>>> result.
>>>
>>> PLLOUT = 24 / (0 + 1) * (18 + 1) = 456MHz (within spec)
>>>           ^     ^         ^
>>>         CLKIN PREDIV     PLLM
>>>
>>> input to PLLDIVn = 456 / (0 + 1) = 456MHz (desired result)
>>>                      ^     ^
>>>                   PLLOUT POSTDIV
>>>
>>
>> These are indeed the correct settings for 456MHz operation, I've used 
>> them in an L138 device a few years ago.
>>
>> Did you also increase the CPU voltage to 1.3V? This can be done 
>> writing to the I2C power management chip, in my stone age setup I had 
>> this piece of code to do that:
>>
>> #define TPS6507X_I2C_ADDR    0x48
>> #define TPS6507X_REG_DEFLDO2    0x17
>> u8 buf = 0x17;
>> i2c_write(TPS6507X_I2C_ADDR, TPS6507X_REG_DEFLDO2, 1, &buf, 1)
>>
>> Without the voltage change, some batches of CPUs will fail to boot 
>> properly at 456MHz.
> 
> 
> I was wondering about this, but it looks to me like the LCDK board (at 
> least the A7E
> revision) has a fixed regulator at 1.3V (TPS650250RHBR). Perhaps you are 
> using a
> different board?

Yeah, the board was based on the DA850 which has an adjustable 
regulator. The L138 can run at lower voltage on lower frequencies, which 
makes for nice power savings (down to 1V at 96MHz if I recall 
correctly), so on a board defaulting to 375MHz the voltage would likely 
be 1v2 instead.

Just wanted to give you a headstart, as it took us quite a while to 
figure out why some chips would boot fine and others would not...

-- 
Mike Looijmans