[U-Boot] [PATCH v2 2/2] ARC: HSDK: enable spi flash support

[Alexey Brodkin]

Hi Eugeniy,

On Mon, 2018-03-26 at 15:57 +0300, Eugeniy Paltsev wrote:
> HSDK board has sst26wf016 spi flash IC which we want to support.
> 
> Add SPI controller, CS-gpio and SPI flash nodes to hsdk device tree.
> Enable corresponding options in hsdk defconfig.
> 
> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com>

IMHO it worth adding a mention about dependency on SST flash patches.
Also I'd add justification to GPIO addition in defconfig.

> ---
>  arch/arc/dts/hsdk.dts  | 26 ++++++++++++++++++++++++++
>  configs/hsdk_defconfig |  9 +++++++++
>  2 files changed, 35 insertions(+)
> 
> diff --git a/arch/arc/dts/hsdk.dts b/arch/arc/dts/hsdk.dts
> index 09f3fe9a37..4bb3035d53 100644
> --- a/arch/arc/dts/hsdk.dts
> +++ b/arch/arc/dts/hsdk.dts
> @@ -14,6 +14,7 @@
>  
>  	aliases {
>  		console = &uart0;
> +		spi0 = &spi0;
>  	};
>  
>  	cpu_card {
> @@ -83,4 +84,29 @@
>  		compatible = "generic-ohci";
>  		reg = <0xf0060000 0x100>;
>  	};
> +
> +	spi0: spi at f0020000 {
> +		compatible = "snps,dw-apb-ssi";
> +		reg = <0xf0020000 0x1000>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		spi-max-frequency = <4000000>;
> +		clocks = <&cgu_clk CLK_SYS_SPI_REF>;
> +		clock-names = "spi_clk";
> +		cs-gpio = <&cs_gpio 0>;
> +		spi_flash at 0 {
> +			compatible = "spi-flash";
> +			reg = <0>;
> +			spi-max-frequency = <4000000>;
> +		};
> +	};
> +
> +	cs_gpio: gpio at f00114B0 {

Hm "reg" value doesn't match node name: f00114B0 vs f00014B0.
Which one is correct?

> +		compatible = "snps,hsdk-creg-gpio";
> +		reg = <0xf00014B0 0x4>;
> +		gpio-controller;
> +		#gpio-cells = <1>;
> +		gpio-bank-name = "hsdk-spi-cs";
> +		gpio-count = <1>;
> +	};
>  };
> diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig
> index c72ee2d0c1..476ce6a974 100644
> --- a/configs/hsdk_defconfig
> +++ b/configs/hsdk_defconfig
> @@ -12,6 +12,8 @@ CONFIG_SYS_PROMPT="hsdk# "
>  CONFIG_CMD_ENV_FLAGS=y
>  # CONFIG_CMD_FLASH is not set
>  CONFIG_CMD_MMC=y
> +CONFIG_CMD_SF=y
> +CONFIG_CMD_SPI=y
>  CONFIG_CMD_USB=y
>  # CONFIG_CMD_SETEXPR is not set
>  CONFIG_CMD_DHCP=y
> @@ -29,12 +31,19 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
>  CONFIG_NET_RANDOM_ETHADDR=y
>  CONFIG_DM=y
>  CONFIG_CLK_HSDK=y
> +CONFIG_DM_GPIO=y
> +CONFIG_HSDK_CREG_GPIO=y
>  CONFIG_MMC=y
>  CONFIG_MMC_DW=y
> +CONFIG_DM_SPI_FLASH=y
> +CONFIG_SPI_FLASH=y
> +CONFIG_SPI_FLASH_SST=y
>  CONFIG_DM_ETH=y
>  CONFIG_ETH_DESIGNWARE=y
>  CONFIG_DM_SERIAL=y
>  CONFIG_SYS_NS16550=y
> +CONFIG_DM_SPI=y
> +CONFIG_DESIGNWARE_SPI=y
>  CONFIG_USB=y
>  CONFIG_DM_USB=y
>  CONFIG_USB_EHCI_HCD=y

-Alexey