[U-Boot] [PATCH] ARM: am33xx: Inhibit re-initialization of DDR during RTC-only

Keerthy j-keerthy at ti.com
Tue Mar 27 02:55:46 UTC 2018



On Tuesday 20 March 2018 12:23 PM, Keerthy wrote:
> From: Russ Dill <Russ.Dill at ti.com>
> 
> This inhibits the re-inititialization of DDR during an RTC-only resume. If
> this is not done, an L3 NOC error is produced as the DDR gets accessed
> before the re-init has time to complete. Tested on AM437x GP EVM.

Tom,

Any comments on this?

Regards,
Keerthy
> 
> Signed-off-by: Russ Dill <Russ.Dill at ti.com>
> [j-keerthy at ti.com Ported to Latest Master branch]
> Signed-off-by: Keerthy <j-keerthy at ti.com>
> ---
> 
> Applies cleanly on top of:
> 
> https://lists.denx.de/pipermail/u-boot/2018-March/323050.html
> 
>  arch/arm/include/asm/arch-am33xx/cpu.h | 18 ++++++++++++++++--
>  arch/arm/mach-omap2/am33xx/board.c     | 14 ++++++++++++++
>  2 files changed, 30 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h
> index e8d7d54..b8b2db6 100644
> --- a/arch/arm/include/asm/arch-am33xx/cpu.h
> +++ b/arch/arm/include/asm/arch-am33xx/cpu.h
> @@ -68,6 +68,9 @@
>  #define PRM_RSTCTRL_RESET		0x01
>  #define PRM_RSTST_WARM_RESET_MASK	0x232
>  
> +/* EMIF Control register bits */
> +#define EMIF_CTRL_DEVOFF	BIT(0)
> +
>  #ifndef __KERNEL_STRICT_NAMES
>  #ifndef __ASSEMBLY__
>  #include <asm/ti-common/omap_wdt.h>
> @@ -386,8 +389,19 @@ struct cm_device_inst {
>  };
>  
>  struct prm_device_inst {
> -	unsigned int prm_rstctrl;
> -	unsigned int prm_rstst;
> +	unsigned int rstctrl;
> +	unsigned int rstst;
> +	unsigned int rsttime;
> +	unsigned int sram_count;
> +	unsigned int ldo_sram_core_set;	/* offset 0x10 */
> +	unsigned int ldo_sram_core_ctr;
> +	unsigned int ldo_sram_mpu_setu;
> +	unsigned int ldo_sram_mpu_ctrl;
> +	unsigned int io_count;		/* offset 0x20 */
> +	unsigned int io_pmctrl;
> +	unsigned int vc_val_bypass;
> +	unsigned int resv1;
> +	unsigned int emif_ctrl;		/* offset 0x30 */
>  };
>  
>  struct cm_dpll {
> diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
> index ef1de1a..e1d4ddb 100644
> --- a/arch/arm/mach-omap2/am33xx/board.c
> +++ b/arch/arm/mach-omap2/am33xx/board.c
> @@ -376,6 +376,9 @@ static void watchdog_disable(void)
>  static void rtc_only(void)
>  {
>  	struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE;
> +	struct prm_device_inst *prm_device =
> +				(struct prm_device_inst *)PRM_DEVICE_INST;
> +
>  	u32 scratch1;
>  	void (*resume_func)(void);
>  
> @@ -403,9 +406,20 @@ static void rtc_only(void)
>  	 */
>  	rtc_only_update_board_type(scratch1 >> RTC_BOARD_TYPE_SHIFT);
>  
> +	/*
> +	 * Enable EMIF_DEVOFF in PRCM_PRM_EMIF_CTRL to indicate to EMIF we
> +	 * are resuming from self-refresh. This avoids an unnecessary re-init
> +	 * of the DDR. The re-init takes time and we would need to wait for
> +	 * it to complete before accessing DDR to avoid L3 NOC errors.
> +	 */
> +	writel(EMIF_CTRL_DEVOFF, &prm_device->emif_ctrl);
> +
>  	rtc_only_prcm_init();
>  	sdram_init();
>  
> +	/* Disable EMIF_DEVOFF for normal operation and to exit self-refresh */
> +	writel(0, &prm_device->emif_ctrl);
> +
>  	resume_func = (void *)readl(&rtc->scratch0);
>  	if (resume_func)
>  		resume_func();
> 


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