[U-Boot] [PATCH 2/5] ARM: arm926ejs: fix lowlevel_init call

[klaus.goger at theobroma-systems.com]

> On 07.05.2018, at 10:25, Chris Packham <judge.packham at gmail.com> wrote:
> 
> Hi Mans, Stefano,
> 
> On Fri, Apr 27, 2018 at 9:00 PM Stefano Babic <sbabic at denx.de> wrote:
> 
>> On 21/04/2018 17:11, Mans Rullgard wrote:
>>> The code attempts to preserve the value of LR by storing it in R12/IP
>>> across the lowevel_init() call.  However, this register is not saved
>>> by the callee.  Use a register that guaranteed to be preserved instead.
>>> 
>>> Signed-off-by: Mans Rullgard <mans at mansr.com>
>>> ---
>>> arch/arm/cpu/arm926ejs/start.S | 4 ++--
>>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>> 
>>> diff --git a/arch/arm/cpu/arm926ejs/start.S
> b/arch/arm/cpu/arm926ejs/start.S
>>> index 959d1ed86d8a..a6f0bdb70345 100644
>>> --- a/arch/arm/cpu/arm926ejs/start.S
>>> +++ b/arch/arm/cpu/arm926ejs/start.S
>>> @@ -105,9 +105,9 @@ flush_dcache:
>>>      /*
>>>       * Go setup Memory and board specific bits prior to relocation.
>>>       */
>>> -     mov     ip, lr          /* perserve link reg across call */
>>> +     mov     r4, lr          /* perserve link reg across call */
>>>      bl      lowlevel_init   /* go setup pll,mux,memory */
>>> -     mov     lr, ip          /* restore link */
>>> +     mov     lr, r4          /* restore link */
>>> #endif
>>>      mov     pc, lr          /* back to my caller */
>>> #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
>>> 
> 
>> Applied to u-boot-imx, thanks !
> 
> I think this might be causing me a problem on a Marvell Kirkwood board I'm
> working on getting into upstream. It may also be problematic for orion5x
> boards. Both of these use r4 in lowlevel_init.
> 
> Obviously I can fix the board that I'm working on. Is there some
> expectation as to which registers can be clobbered?

The "Procedure Call Standard for the ARM® Architecture” may help:
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042f/IHI0042F_aapcs.pdf
Page 15

   A subroutine must preserve the contents of the registers r4-r8, r10, r11 and
   SP (and r9 in PCS variants that designate r9 as v6).

So for thumb r1-r3 and r12 should be usable  without taking any care of them.
Maybe r13 depending if you already have a stack or not. 

Regards,
Klaus