[U-Boot] rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSIC

Jonathan Gray jsg at jsg.id.au
Tue May 8 07:51:14 UTC 2018


On Thu, Apr 26, 2018 at 09:05:33AM +0200, Philipp Tomsich wrote:
> > The generic ehci-driver (ehci-generic.c) will try to enable the clocks
> > listed in the DTSI. If this fails (e.g. due to clk_enable not being
> > implemented in a driver and -ENOSYS being returned by the clk-uclass),
> > the driver will bail our and print an error message.
> > 
> > This implements a minimal clk_enable for the RK3288 and supports the
> > clocks mandatory for the EHCI controllers; as these are enabled by
> > default we simply return success.
> > 
> > Signed-off-by: Wadim Egorov <w.egorov at phytec.de>
> > Acked-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>
> > Reviewed-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>
> > ---
> >  drivers/clk/rockchip/clk_rk3288.c | 13 +++++++++++++
> >  1 file changed, 13 insertions(+)
> > 
> 
> Applied to u-boot-rockchip, thanks!

This change broke Ethernet on tinker-rk3288.

U-Boot 2018.05-00002-g6ea9f3dd70 (May 08 2018 - 17:21:32 +1000)

Model: Tinker-RK3288
DRAM:  2 GiB
MMC:   dwmmc at ff0c0000: 1
Loading Environment from MMC... *** Warning - bad CRC, using default environment

Failed (-5)
In:    serial
Out:   serial
Err:   serial
Model: Tinker-RK3288
Net:   failed to enable clock 0
No ethernet found.

After reverting it:

U-Boot 2018.05-00003-g338bfe2fbf (May 08 2018 - 17:40:09 +1000)

Model: Tinker-RK3288
DRAM:  2 GiB
MMC:   dwmmc at ff0c0000: 1
Loading Environment from MMC... *** Warning - bad CRC, using default environment

Failed (-5)
In:    serial
Out:   serial
Err:   serial
Model: Tinker-RK3288
Net:   eth0: ethernet at ff290000
Hit any key to stop autoboot:  0

If the default case returned ENOSYS or ENOTSUPP instead of ENOENT it
would work given the changes that were made last time this broke.

commit 1693a577be14a92e61563bad306aa11a359757f5
Author: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com>
Date:   Tue Feb 6 17:12:09 2018 +0300

    NET: designware: fix clock enable


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