[U-Boot] [PATCH v2] arm: zynq: Add initial support for Avnet MiniZed

Michal Simek michal.simek at xilinx.com
Thu May 10 08:20:53 UTC 2018


On 9.5.2018 17:56, Ibai Erkiaga wrote:
> Initial support for Avnet MiniZed board. Tested UART1 (serial console),
> QSPI(Flash), SDHCI1 (eMMC), USB.
> 
> Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza at xilinx.com>
> ---
> Changes for v2:
> 	-board model changed to use Avent prefix
> 	-usb phy driver changed usb-no-xceiv
> 	-removed gpio and intc binding
> 	-fixed-partitions usage
> ---
> U-Boot 2018.05-00023-gdf332c1-dirty (May 09 2018 - 14:50:51 +0100)
> 
> Model: Avnet Zynq MiniZed Development Board
> Board: Xilinx Zynq
> Silicon: v3.1
> DRAM:  ECC disabled 512 MiB
> MMC:   sdhci at e0101000: 0
> Loading Environment from SPI Flash... SF: Detected n25q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB
> OK
> In:    serial at e0001000
> Out:   serial at e0001000
> Err:   serial at e0001000
> Net:   No ethernet found.
> Hit any key to stop autoboot:  0
> Zynq> fatls mmc 0
>  16783864   image.ub
>       183   wpa_supplicant.conf
>   1391116   smallboot.bin
> 
> 3 file(s), 0 dir(s)
> 
> Zynq> sf probe 0 0 0
> SF: Detected n25q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB
> Zynq> usb start
> starting USB...
> USB0:   USB EHCI 1.00
> scanning bus 0 for devices... 2 USB Device(s) found
>        scanning usb for storage devices... 1 Storage Device(s) found
> Zynq> fatls usb 0
>        12   test.txt
> 
> 1 file(s), 0 dir(s)
> 
> Zynq>
> ---
>  arch/arm/dts/Makefile          |    1 +
>  arch/arm/dts/zynq-minized.dts  |  104 ++++++++++++++++++++++++++++++++++++++++
>  configs/zynq_minized_defconfig |   68 ++++++++++++++++++++++++++
>  3 files changed, 173 insertions(+), 0 deletions(-)
>  create mode 100644 arch/arm/dts/zynq-minized.dts
>  create mode 100644 configs/zynq_minized_defconfig
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 6fe93a8..5c5f8a8 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -129,6 +129,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
>  	zynq-cc108.dtb \
>  	zynq-cse-qspi-single.dtb \
>  	zynq-microzed.dtb \
> +	zynq-minized.dtb \
>  	zynq-picozed.dtb \
>  	zynq-syzygy-hub.dtb \
>  	zynq-topic-miami.dtb \
> diff --git a/arch/arm/dts/zynq-minized.dts b/arch/arm/dts/zynq-minized.dts
> new file mode 100644
> index 0000000..68fe09a
> --- /dev/null
> +++ b/arch/arm/dts/zynq-minized.dts
> @@ -0,0 +1,104 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * dts file for Avnet MiniZed board
> + *
> + * (C) Copyright 2017 - 2018, Xilinx, Inc.
> + *
> + * Ibai Erkiaga <ibai.erkiaga-elorza at xilinx.com>
> + */
> +
> +/dts-v1/;
> +#include "zynq-7000.dtsi"
> +
> +/ {
> +	model = "Avnet Zynq MiniZed Development Board";
> +	compatible = "avnet,minized", "xlnx,zynq-7000";
> +
> +	aliases {
> +		serial0 = &uart1;
> +		serial1 = &uart0;
> +		spi0 = &qspi;
> +		mmc0 = &sdhci0;
> +	};
> +
> +	memory at 0 {
> +		device_type = "memory";
> +		reg = <0x0 0x20000000>;
> +	};
> +
> +	chosen {
> +		bootargs = "";
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	usb_phy0: phy0 {
> +		compatible = "usb-nop-xceiv";
> +		#phy-cells = <0>;
> +	};
> +};
> +
> +&qspi {
> +	status = "okay";
> +	is-dual = <0>;
> +	num-cs = <1>;
> +	flash at 0 {
> +		compatible = "micron,m25p128";
> +		reg = <0x0>;
> +		spi-tx-bus-width = <4>;
> +		spi-rx-bus-width = <4>;
> +		spi-max-frequency = <50000000>;
> +		partitions {
> +			compatible = "fixed-partitions";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			partition at 0 {
> +				label = "boot";
> +				reg = <0x0 0xff0000>;
> +			};
> +
> +			partition at 0270000 {

remove this leading zero.

> +				label = "kernel";
> +				reg = <0x270000 0xd80000>;
> +			};
> +
> +			partition at ff0000 {
> +				label = "bootenv";
> +				reg = <0xff0000 0x10000>;
> +			};
> +
> +			partition at 1000000 {
> +				label = "spare";
> +				reg = <0x1000000 0x0>;
> +			};
> +		};
> +	};
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> +
> +&uart1 {
> +	u-boot,dm-pre-reloc;
> +	status = "okay";
> +};
> +
> +&usb0 {
> +	status = "okay";
> +	dr_mode = "host";
> +	usb-phy = <&usb_phy0>;
> +	usb-reset = <&gpio0 7 0>; /* USB_RST_N-MIO7 */ };

}; on next line please.

> +
> +&sdhci1 {
> +	status = "okay";
> +	non-removable;
> +	bus-width = <4>;
> +
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +	mmccard: mmccard at 0 {
> +		compatible = "mmc-card";
> +		reg = <0>;
> +		broken-hpi;
> +	};
> +};
> diff --git a/configs/zynq_minized_defconfig b/configs/zynq_minized_defconfig
> new file mode 100644
> index 0000000..05cfc0e
> --- /dev/null
> +++ b/configs/zynq_minized_defconfig
> @@ -0,0 +1,68 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_ZYNQ=y
> +CONFIG_SYS_TEXT_BASE=0x4000000
> +CONFIG_SPL=y
> +CONFIG_SPL_STACK_R_ADDR=0x200000
> +CONFIG_DEFAULT_DEVICE_TREE="zynq-minized"
> +CONFIG_DEBUG_UART=y
> +CONFIG_DISTRO_DEFAULTS=y
> +CONFIG_FIT=y
> +CONFIG_FIT_SIGNATURE=y
> +CONFIG_FIT_VERBOSE=y
> +CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
> +# CONFIG_DISPLAY_CPUINFO is not set

This should be removed based on
"arm: zynq: Remove checkboard and enable DISPLAY_CPUINFO"


> +CONFIG_SPL_STACK_R=y
> +CONFIG_SPL_OS_BOOT=y
> +CONFIG_SYS_PROMPT="Zynq> "
> +CONFIG_CMD_THOR_DOWNLOAD=y
> +CONFIG_CMD_DFU=y
> +# CONFIG_CMD_FLASH is not set
> +CONFIG_CMD_FPGA_LOADBP=y
> +CONFIG_CMD_FPGA_LOADFS=y
> +CONFIG_CMD_FPGA_LOADMK=y
> +CONFIG_CMD_FPGA_LOADP=y
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_SF=y
> +CONFIG_CMD_USB=y
> +# CONFIG_CMD_SETEXPR is not set
> +CONFIG_CMD_TFTPPUT=y
> +CONFIG_CMD_CACHE=y
> +CONFIG_CMD_EXT4_WRITE=y
> +CONFIG_OF_EMBED=y

Based on discussion in past this is more for debugging purpose and we
are not enabling it for zynq board.

> +CONFIG_ENV_IS_IN_SPI_FLASH=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
> +CONFIG_DFU_MMC=y
> +CONFIG_DFU_RAM=y
> +CONFIG_FPGA_XILINX=y
> +CONFIG_FPGA_ZYNQPL=y
> +CONFIG_DM_GPIO=y
> +CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_ZYNQ=y
> +CONFIG_SPI_FLASH=y
> +CONFIG_SPI_FLASH_BAR=y
> +CONFIG_SPI_FLASH_SPANSION=y
> +CONFIG_SPI_FLASH_STMICRO=y
> +CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_PHY_MARVELL=y
> +CONFIG_PHY_REALTEK=y
> +CONFIG_PHY_XILINX=y
> +CONFIG_ZYNQ_GEM=y
> +CONFIG_DEBUG_UART_ZYNQ=y
> +CONFIG_DEBUG_UART_BASE=0xe0001000
> +CONFIG_DEBUG_UART_CLOCK=50000000
> +CONFIG_ZYNQ_SERIAL=y
> +CONFIG_ZYNQ_QSPI=y
> +CONFIG_USB=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_ULPI_VIEWPORT=y
> +CONFIG_USB_ULPI=y
> +CONFIG_USB_STORAGE=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
> +CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
> +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
> +CONFIG_CI_UDC=y
> +CONFIG_USB_GADGET_DOWNLOAD=y
> +CONFIG_USB_FUNCTION_THOR=y
> 

The rest looks good.

Thanks,
Michal


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