[U-Boot] [PATCH] ARM: socfpga: Zap CONFIG_SOCFPGA_VIRTUAL_TARGET
Marek Vasut
marex at denx.de
Sat May 12 20:27:18 UTC 2018
This was never used, is not used anywhere and is just in the way
by adding annoying ifdeffery. Get rid of it.
Signed-off-by: Marek Vasut <marex at denx.de>
Cc: Chin Liang See <chin.liang.see at intel.com>
Cc: Dinh Nguyen <dinguyen at kernel.org>
---
arch/arm/mach-socfpga/include/mach/reset_manager.h | 4 ----
arch/arm/mach-socfpga/misc_gen5.c | 4 ----
arch/arm/mach-socfpga/reset_manager_arria10.c | 8 --------
arch/arm/mach-socfpga/reset_manager_gen5.c | 9 ---------
arch/arm/mach-socfpga/spl.c | 5 -----
include/configs/socfpga_common.h | 13 ++-----------
scripts/config_whitelist.txt | 1 -
7 files changed, 2 insertions(+), 42 deletions(-)
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h b/arch/arm/mach-socfpga/include/mach/reset_manager.h
index 7cfed7d001..d3ae80bc27 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
@@ -11,11 +11,7 @@ void reset_cpu(ulong addr);
void socfpga_per_reset(u32 reset, int set);
void socfpga_per_reset_all(void);
-#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
-#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 2
-#else
#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1
-#endif
/*
* Define a reset identifier, from which a permodrst bank ID
diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c
index b9db3aef09..efec58d555 100644
--- a/arch/arm/mach-socfpga/misc_gen5.c
+++ b/arch/arm/mach-socfpga/misc_gen5.c
@@ -264,12 +264,8 @@ int arch_early_init_r(void)
setbits_le32(&scu_regs->sacr, 0xfff);
/* Configure the L2 controller to make SDRAM start at 0 */
-#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
- writel(0x2, &nic301_regs->remap);
-#else
writel(0x1, &nic301_regs->remap); /* remap.mpuzero */
writel(0x1, &pl310->pl310_addr_filter_start);
-#endif
/* Add device descriptor to FPGA device table */
socfpga_fpga_add();
diff --git a/arch/arm/mach-socfpga/reset_manager_arria10.c b/arch/arm/mach-socfpga/reset_manager_arria10.c
index 99e2b8e6e6..b4434f2ded 100644
--- a/arch/arm/mach-socfpga/reset_manager_arria10.c
+++ b/arch/arm/mach-socfpga/reset_manager_arria10.c
@@ -316,13 +316,6 @@ void socfpga_per_reset_all(void)
setbits_le32(&reset_manager_base->per0modrst, mask_ecc_ocp);
}
-#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
-int socfpga_bridges_reset(void)
-{
- /* For SoCFPGA-VT, this is NOP. */
- return 0;
-}
-#else
int socfpga_bridges_reset(void)
{
int ret;
@@ -379,4 +372,3 @@ int socfpga_bridges_reset(void)
return 0;
}
-#endif
diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach-socfpga/reset_manager_gen5.c
index b261a94486..25baef79bc 100644
--- a/arch/arm/mach-socfpga/reset_manager_gen5.c
+++ b/arch/arm/mach-socfpga/reset_manager_gen5.c
@@ -69,14 +69,6 @@ void reset_deassert_peripherals_handoff(void)
writel(0, &reset_manager_base->per_mod_reset);
}
-#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
-void socfpga_bridges_reset(int enable)
-{
- /* For SoCFPGA-VT, this is NOP. */
- return;
-}
-#else
-
#define L3REGS_REMAP_LWHPS2FPGA_MASK 0x10
#define L3REGS_REMAP_HPS2FPGA_MASK 0x08
#define L3REGS_REMAP_OCRAM_MASK 0x01
@@ -110,4 +102,3 @@ void socfpga_bridges_reset(int enable)
}
return;
}
-#endif
diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
index 4b86eadd81..515832031a 100644
--- a/arch/arm/mach-socfpga/spl.c
+++ b/arch/arm/mach-socfpga/spl.c
@@ -78,9 +78,7 @@ static void socfpga_nic301_slave_ns(void)
void board_init_f(ulong dummy)
{
-#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET
const struct cm_config *cm_default_cfg = cm_get_default_config();
-#endif
unsigned long sdram_size;
unsigned long reg;
@@ -107,7 +105,6 @@ void board_init_f(ulong dummy)
writel(0x1, &nic301_regs->remap); /* remap.mpuzero */
writel(0x1, &pl310->pl310_addr_filter_start);
-#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET
debug("Freezing all I/O banks\n");
/* freeze all IO banks */
sys_mgr_frzctrl_freeze_req();
@@ -142,8 +139,6 @@ void board_init_f(ulong dummy)
sysmgr_pinmux_init();
sysmgr_config_warmrstcfgio(0);
-#endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */
-
/* De-assert reset for peripherals and bridges based on handoff */
reset_deassert_peripherals_handoff();
socfpga_bridges_reset(0);
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index cb67d539b1..54b9edc97c 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -5,9 +5,6 @@
#ifndef __CONFIG_SOCFPGA_COMMON_H__
#define __CONFIG_SOCFPGA_COMMON_H__
-/* Virtual target or real hardware */
-#undef CONFIG_SOCFPGA_VIRTUAL_TARGET
-
/*
* High level configuration
*/
@@ -76,7 +73,7 @@
/*
* Ethernet on SoC (EMAC)
*/
-#if defined(CONFIG_CMD_NET) && !defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
+#ifdef CONFIG_CMD_NET
#define CONFIG_DW_ALTDESCRIPTOR
#define CONFIG_MII
#endif
@@ -95,11 +92,7 @@
#define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS
#define CONFIG_SYS_TIMER_COUNTS_DOWN
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
-#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
-#define CONFIG_SYS_TIMER_RATE 2400000
-#else
#define CONFIG_SYS_TIMER_RATE 25000000
-#endif
/*
* L4 Watchdog
@@ -181,9 +174,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
*/
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE -4
-#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
-#define CONFIG_SYS_NS16550_CLK 1000000
-#elif defined(CONFIG_TARGET_SOCFPGA_GEN5)
+#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
#define CONFIG_SYS_NS16550_COM1 SOCFPGA_UART0_ADDRESS
#define CONFIG_SYS_NS16550_CLK 100000000
#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index bdbfcbeb70..f8e03de53b 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1849,7 +1849,6 @@ CONFIG_SMSTP6_ENA
CONFIG_SMSTP7_ENA
CONFIG_SMSTP8_ENA
CONFIG_SMSTP9_ENA
-CONFIG_SOCFPGA_VIRTUAL_TARGET
CONFIG_SOCRATES
CONFIG_SOC_AU1000
CONFIG_SOC_AU1100
--
2.16.2
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