[U-Boot] [PATCH v2] phy: add support for STM32 usb phy controller

[Patrice CHOTARD]

Hi Marek

On 05/16/2018 11:37 AM, Marek Vasut wrote:
> On 05/15/2018 03:27 PM, Patrice CHOTARD wrote:
>> Hi Marek
>>
>> On 04/27/2018 11:18 AM, Marek Vasut wrote:
>>> On 04/27/2018 11:01 AM, Patrice Chotard wrote:
>>>> This patch adds phy tranceiver driver for STM32 USB PHY
>>>> Controller (usbphyc) that provides dual port High-Speed
>>>> phy for OTG (single port) and EHCI/OHCI host controller
>>>> (two ports).
>>>
>>> Oh, I see.
>>>
>>>> One port of the phy is shared between the two USB controllers
>>>> through a UTMI+ switch.
>>>>
>>>> Signed-off-by: Christophe Kerello <christophe.kerello at st.com>
>>>> Signed-off-by: Amelie Delaunay <amelie.delaunay at st.com>
>>>> Signed-off-by: Patrice Chotard <patrice.chotard at st.com>
>>>> ---
>>>
>>> [...]
>>>
>>>> +static int stm32_usbphyc_probe(struct udevice *dev)
>>>> +{
>>>> +	struct stm32_usbphyc *usbphyc = dev_get_priv(dev);
>>>> +	struct reset_ctl reset;
>>>> +	ofnode node;
>>>> +	int i, ret;
>>>> +
>>>> +	usbphyc->base = dev_read_addr(dev);
>>>> +	if (usbphyc->base == FDT_ADDR_T_NONE)
>>>> +		return -EINVAL;
>>>> +
>>>> +	/* Enable clock */
>>>> +	ret = clk_get_by_index(dev, 0, &usbphyc->clk);
>>>> +	if (ret)
>>>> +		return ret;
>>>> +
>>>> +	ret = clk_enable(&usbphyc->clk);
>>>> +	if (ret)
>>>> +		return ret;
>>>> +
>>>> +	/* Reset */
>>>> +	ret = reset_get_by_index(dev, 0, &reset);
>>>> +	if (!ret) {
>>>> +		reset_assert(&reset);
>>>> +		udelay(2);
>>>> +		reset_deassert(&reset);
>>>
>>> Shouldn't the reset delay be a reset controller property ?
>>>
>>>> +	}
>>>
>>> Looks good,
>>> Reviewed-by: Marek Vasut <marex at denx.de>
>>>
>>> Remind me to pick it after the release please.
>>>
>>
>> As you requested to me, can you pick the patch ?
> 
> I had to tweak the patch a bit, since it didnt apply anymore. Please
> check if it's correct, it should be OK though.

Perfect !

Thanks

Patrice

>