[U-Boot] [PATCH v2 00/16] Add Intel Stratix 10 SoC support

Ley Foon Tan ley.foon.tan at intel.com
Fri May 18 14:05:20 UTC 2018


This is 2nd version of patchset to adds support for Intel Stratix 10 SoC.
This patchset is work on top of patchset in [1].

Changes:
- update base addresses header
- use reset framework for periperhals (16550 UART, MMC, EMAC)
- change to use serial DM driver
- move bridge command to misc common driver and reuse for other platforms
- rework board_init_f() in SPL
- update S10 dts and dtsi
- Mailbox:
  - change to use register offset to access register instead of register structure
  - rename function with __xxx prefix
- DDR:
  - rework DDR driver
  - change to use register offset to access register instead of register structure
  - remove union bitwise structure
  - use wait_for_bit to poll

Patchset history:
[v1]: https://patchwork.ozlabs.org/cover/900499/

[1]: https://patchwork.ozlabs.org/cover/910018/

Ley Foon Tan (16):
  arm: socfpga: stratix10: Add watchdog and firewall base addresses
  arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC
  arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC
  arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC
  arm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switch
  arm: socfpga: misc: Move bridge command to misc common
  arm: socfpga: stratix10: Add misc support for Stratix10 SoC
  arm: socfpga: stratix10: Add mailbox support for Stratix10 SoC
  arm: socfpga: stratix10: Add MMU support for Stratix10 SoC
  arm: socfpga: Restructure the SPL file
  arm: socfpga: stratix10: Add SPL driver for Stratix10 SoC
  arm: socfpga: stratix10: Add timer support for Stratix10 SoC
  ddr: altera: stratix10: Add DDR support for Stratix10 SoC
  board: altera: stratix10: Add socdk board support for Stratix10 SoC
  arm: dts: socfpga: stratix10: update dtsi and dts
  arm: socfpga: stratix10: Enable Stratix10 SoC build

 arch/arm/Kconfig                                   |    9 +-
 arch/arm/dts/socfpga_stratix10.dtsi                |   22 +-
 arch/arm/dts/socfpga_stratix10_socdk.dts           |    3 +
 arch/arm/mach-socfpga/Kconfig                      |   16 +
 arch/arm/mach-socfpga/Makefile                     |   23 +-
 arch/arm/mach-socfpga/clock_manager.c              |    4 +-
 arch/arm/mach-socfpga/clock_manager_s10.c          |  380 +++++++++++++++++++
 arch/arm/mach-socfpga/include/mach/base_addr_s10.h |   11 +
 arch/arm/mach-socfpga/include/mach/clock_manager.h |    2 +
 .../mach-socfpga/include/mach/clock_manager_s10.h  |  210 +++++++++++
 arch/arm/mach-socfpga/include/mach/firewall_s10.h  |  120 ++++++
 arch/arm/mach-socfpga/include/mach/handoff_s10.h   |   34 ++
 arch/arm/mach-socfpga/include/mach/mailbox_s10.h   |  144 ++++++++
 arch/arm/mach-socfpga/include/mach/misc.h          |    2 +
 arch/arm/mach-socfpga/include/mach/reset_manager.h |    2 +
 .../mach-socfpga/include/mach/reset_manager_s10.h  |  116 ++++++
 arch/arm/mach-socfpga/include/mach/sdram_s10.h     |  183 +++++++++
 .../arm/mach-socfpga/include/mach/system_manager.h |    5 +-
 .../mach-socfpga/include/mach/system_manager_s10.h |  176 +++++++++
 arch/arm/mach-socfpga/mailbox_s10.c                |  380 +++++++++++++++++++
 arch/arm/mach-socfpga/misc.c                       |   34 ++
 arch/arm/mach-socfpga/misc_gen5.c                  |   26 +--
 arch/arm/mach-socfpga/misc_s10.c                   |  133 +++++++
 arch/arm/mach-socfpga/mmu-arm64_s10.c              |   71 ++++
 arch/arm/mach-socfpga/reset_manager.c              |   13 +
 arch/arm/mach-socfpga/reset_manager_s10.c          |  140 +++++++
 arch/arm/mach-socfpga/spl_a10.c                    |  105 ++++++
 arch/arm/mach-socfpga/{spl.c => spl_gen5.c}        |   57 +---
 arch/arm/mach-socfpga/spl_s10.c                    |  199 ++++++++++
 arch/arm/mach-socfpga/system_manager_s10.c         |   91 +++++
 arch/arm/mach-socfpga/timer_s10.c                  |   26 ++
 arch/arm/mach-socfpga/wrap_pinmux_config_s10.c     |   56 +++
 arch/arm/mach-socfpga/wrap_pll_config_s10.c        |   59 +++
 board/altera/stratix10-socdk/MAINTAINERS           |    7 +
 board/altera/stratix10-socdk/Makefile              |    7 +
 board/altera/stratix10-socdk/socfpga.c             |    7 +
 configs/socfpga_stratix10_defconfig                |   58 +++
 drivers/ddr/altera/Makefile                        |    1 +
 drivers/ddr/altera/sdram_s10.c                     |  388 ++++++++++++++++++++
 include/configs/socfpga_stratix10_socdk.h          |  222 +++++++++++
 40 files changed, 3459 insertions(+), 83 deletions(-)
 create mode 100644 arch/arm/mach-socfpga/clock_manager_s10.c
 create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_s10.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/firewall_s10.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/handoff_s10.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/mailbox_s10.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/sdram_s10.h
 create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_s10.h
 create mode 100644 arch/arm/mach-socfpga/mailbox_s10.c
 create mode 100644 arch/arm/mach-socfpga/misc_s10.c
 create mode 100644 arch/arm/mach-socfpga/mmu-arm64_s10.c
 create mode 100644 arch/arm/mach-socfpga/reset_manager_s10.c
 create mode 100644 arch/arm/mach-socfpga/spl_a10.c
 rename arch/arm/mach-socfpga/{spl.c => spl_gen5.c} (82%)
 create mode 100644 arch/arm/mach-socfpga/spl_s10.c
 create mode 100644 arch/arm/mach-socfpga/system_manager_s10.c
 create mode 100644 arch/arm/mach-socfpga/timer_s10.c
 create mode 100644 arch/arm/mach-socfpga/wrap_pinmux_config_s10.c
 create mode 100644 arch/arm/mach-socfpga/wrap_pll_config_s10.c
 create mode 100644 board/altera/stratix10-socdk/MAINTAINERS
 create mode 100644 board/altera/stratix10-socdk/Makefile
 create mode 100644 board/altera/stratix10-socdk/socfpga.c
 create mode 100644 configs/socfpga_stratix10_defconfig
 create mode 100644 drivers/ddr/altera/sdram_s10.c
 create mode 100644 include/configs/socfpga_stratix10_socdk.h



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