[U-Boot] [PATCH v2 05/16] arm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switch

[Marek Vasut]

On 05/18/2018 04:05 PM, Ley Foon Tan wrote:
> Preparation for Stratix 10 enablement. In ARM64, L2 cache controller is
> accessed through processor registers. So, add CONFIG_SYS_L2_PL310 switch
> conditional build in order this file can by shared across other SOCFPGAs.
> 
> Signed-off-by: Chin Liang See <chin.liang.see at intel.com>
> Signed-off-by: Ley Foon Tan <ley.foon.tan at intel.com>

Applied 01..05, thanks

-- 
Best regards,
Marek Vasut