[U-Boot] [PATCH 28/41] net: fec_mxc: Add the init_clk_fec function

[Peng Fan]

From: Ye Li <ye.li at nxp.com>

When the power domain driver is enabled, we need to enable clocks after power
domain on. So the clock settings can't set in board_init, needs to set them
when the device is probed. Add this weak function in driver, that SoC codes
can implement the clock settings.

Reviewed-by: Peng Fan <peng.fan at nxp.com>
Signed-off-by: Ye Li <ye.li at nxp.com>
Cc: Joe Hershberger <joe.hershberger at ni.com>
---
 drivers/net/fec_mxc.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index b512a71c0c..d4e5a2a776 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -1037,6 +1037,10 @@ struct mii_dev *fec_get_miibus(ulong base_addr, int dev_id)
 	return bus;
 }
 
+__weak void init_clk_fec(int index)
+{
+}
+
 #ifndef CONFIG_DM_ETH
 #ifdef CONFIG_PHYLIB
 int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr,
@@ -1154,6 +1158,7 @@ int fecmxc_initialize_multi(bd_t *bd, int dev_id, int phy_id, uint32_t addr)
 #else
 	base_mii = addr;
 #endif
+	init_clk_fec(dev_id);
 	debug("eth_init: fec_probe(bd, %i, %i) @ %08x\n", dev_id, phy_id, addr);
 	bus = fec_get_miibus(base_mii, dev_id);
 	if (!bus)
@@ -1253,6 +1258,8 @@ static int fecmxc_probe(struct udevice *dev)
 	uint32_t start;
 	int ret;
 
+	init_clk_fec(dev->seq);
+
 	ret = fec_alloc_descs(priv);
 	if (ret)
 		return ret;
-- 
2.14.1