[U-Boot] [PATCH] arm: mvebu: move i2c slave disable to generic SPL code

Maxime Ripard maxime.ripard at bootlin.com
Tue May 29 15:39:14 UTC 2018


Hi!

On Mon, May 28, 2018 at 11:04:38AM +0200, Stefan Roese wrote:
> (Added Jagan and Maxime to Cc)
> 
> On 28.05.2018 10:55, Chris Packham wrote:
> > Hi Baruch,
> > 
> > On Mon, May 28, 2018 at 8:22 PM Baruch Siach <baruch at tkos.co.il> wrote:
> > 
> > > Hi Chris,
> > 
> > > On Mon, May 28, 2018 at 08:11:39PM +1200, Chris Packham wrote:
> > > > On Mon, May 28, 2018 at 3:27 AM Baruch Siach <baruch at tkos.co.il> wrote:
> > > > > The hidden i2c slave that interferes the i2c bus is not board
> > specific.
> > > > > All Armada 38x SoCs are affected. Move the code disabling this slave
> > to
> > > > > generic code to make it work on all affected hardware.
> > > > 
> > > > I can't find a definition of this but the register seems to work for
> > > > kirkwood as well (not surprising since it's probably a common IP
> > block). Is
> > > > there any chance we can find a home for this that's available to boards
> > > > that don't use SPL?
> > 
> > > This workaround is Armada 38x specific. Are you aware of any 38x SoC based
> > > system that does not use SPL?
> > 
> > > As far as I can see 38x support requires SPL. CONFIG_ARMADA_38X selects
> > > CONFIG_ARMADA_32BIT that in turn selects CONFIG_SPL_DM. CONFIG_SPL_DM
> > depends
> > > on CONFIG_SPL.
> > 
> > The original workaround was implemented for the Turris Omnia board, as
> > you've highlighted this is debug register is documented for Armada-385. On
> > a hunch I tried clearing bit 18 of register 0xf101108c on a Kirkwood based
> > board and found that it also works to suppress the 0x64 self address. It's
> > highly likely that the i2c block is common to many Marvell SoCs and it just
> > happens to be documented on A-385.
> 
> Thanks for testing this Chris. This I2C IP core is also used by many
> Allwinner SoCs:
> 
> 	{ .compatible = "allwinner,sun6i-a31-i2c", },
> 
> 
> so it might be possible, that this "feature" is also available here.
> Perhaps somebody from the "sunxi front" can confirm this?

I went back to the thread a bit, but I couldn't really understand what
the issue was exactly. Do you have a spurious slave with the
controller at the address 0x64? When would it happen? Anytime you for
example probe the i2c bus?

Maxime

-- 
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com


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