[U-Boot] [PATCH v3 1/2] sunxi-mmc: use new mode on A64

Vasily Khoruzhick anarsoul at gmail.com
Thu May 31 04:02:18 UTC 2018


That is necessary for using automatic calibration on A64 eMMC.

Signed-off-by: Vasily khoruzhick <anarsoul at gmail.com>
---
 arch/arm/mach-sunxi/Kconfig | 1 +
 drivers/mmc/sunxi_mmc.c     | 4 ++--
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 66fb094ac5..8a35033d1f 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -257,6 +257,7 @@ config MACH_SUN50I
 	select SUNXI_GEN_SUN6I
 	select SUN6I_PRCM
 	select SUNXI_HIGH_SRAM
+	select MMC_SUNXI_HAS_NEW_MODE
 	select SUPPORT_SPL
 	select SUNXI_DRAM_DW
 	select SUNXI_DRAM_DW_32BIT
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index fe6d82c7b4..3bffb1b02e 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -165,10 +165,10 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz)
 	}
 
 	if (new_mode) {
-#ifdef CONFIG_MMC_SUNXI_HAS_NEW_MODE
+#if defined(CONFIG_MMC_SUNXI_HAS_NEW_MODE) && !defined(CONFIG_MACH_SUN50I)
 		val = CCM_MMC_CTRL_MODE_SEL_NEW;
-		setbits_le32(&priv->reg->ntsr, SUNXI_MMC_NTSR_MODE_SEL_NEW);
 #endif
+		setbits_le32(&priv->reg->ntsr, SUNXI_MMC_NTSR_MODE_SEL_NEW);
 	} else {
 		val = CCM_MMC_CTRL_OCLK_DLY(oclk_dly) |
 			CCM_MMC_CTRL_SCLK_DLY(sclk_dly);
-- 
2.17.0



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