[U-Boot] [PATCH 43/93] arm: Remove cl-som-imx7 board

Simon Glass sjg at chromium.org
Mon Nov 19 15:53:23 UTC 2018


This board has not been converted to CONFIG_DM_BLK by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

 arch/arm/mach-imx/mx7/Kconfig            |   1 -
 board/compulab/cl-som-imx7/Kconfig       |  28 --
 board/compulab/cl-som-imx7/MAINTAINERS   |   6 -
 board/compulab/cl-som-imx7/Makefile      |  17 --
 board/compulab/cl-som-imx7/cl-som-imx7.c | 331 -----------------------
 board/compulab/cl-som-imx7/common.c      |  45 ---
 board/compulab/cl-som-imx7/common.h      |  31 ---
 board/compulab/cl-som-imx7/mux.c         | 141 ----------
 board/compulab/cl-som-imx7/spl.c         | 210 --------------
 configs/cl-som-imx7_defconfig            |  67 -----
 include/configs/cl-som-imx7.h            | 182 -------------
 11 files changed, 1059 deletions(-)
 delete mode 100644 board/compulab/cl-som-imx7/Kconfig
 delete mode 100644 board/compulab/cl-som-imx7/MAINTAINERS
 delete mode 100644 board/compulab/cl-som-imx7/Makefile
 delete mode 100644 board/compulab/cl-som-imx7/cl-som-imx7.c
 delete mode 100644 board/compulab/cl-som-imx7/common.c
 delete mode 100644 board/compulab/cl-som-imx7/common.h
 delete mode 100644 board/compulab/cl-som-imx7/mux.c
 delete mode 100644 board/compulab/cl-som-imx7/spl.c
 delete mode 100644 configs/cl-som-imx7_defconfig
 delete mode 100644 include/configs/cl-som-imx7.h

diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig
index 63b90f99500..248e5003575 100644
--- a/arch/arm/mach-imx/mx7/Kconfig
+++ b/arch/arm/mach-imx/mx7/Kconfig
@@ -65,7 +65,6 @@ endchoice
 config SYS_SOC
 	default "mx7"
 
-source "board/compulab/cl-som-imx7/Kconfig"
 source "board/freescale/mx7dsabresd/Kconfig"
 source "board/toradex/colibri_imx7/Kconfig"
 
diff --git a/board/compulab/cl-som-imx7/Kconfig b/board/compulab/cl-som-imx7/Kconfig
deleted file mode 100644
index 6d69cf31f44..00000000000
--- a/board/compulab/cl-som-imx7/Kconfig
+++ /dev/null
@@ -1,28 +0,0 @@
-if TARGET_CL_SOM_IMX7
-
-config SYS_BOARD
-	default "cl-som-imx7"
-
-config SYS_VENDOR
-	default "compulab"
-
-config SYS_CONFIG_NAME
-	default "cl-som-imx7"
-
-config SYS_MMC_DEV
-	int
-	default 0
-
-config SYS_USB_DEV
-	int
-	default 0
-
-config SYS_MMC_IMG_LOAD_PART
-	int
-	default 1
-
-config SYS_USB_IMG_LOAD_PART
-	int
-	default 1
-
-endif
diff --git a/board/compulab/cl-som-imx7/MAINTAINERS b/board/compulab/cl-som-imx7/MAINTAINERS
deleted file mode 100644
index 2b917a5c807..00000000000
--- a/board/compulab/cl-som-imx7/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-CL-SOM-IMX7 BOARD
-M:	Uri Mashiach <uri.mashiach at compulab.co.il>
-S:	Maintained
-F:	board/compulab/cl-som-imx7
-F:	include/configs/cl-som-imx7.h
-F:	configs/cl-som-imx7_defconfig
diff --git a/board/compulab/cl-som-imx7/Makefile b/board/compulab/cl-som-imx7/Makefile
deleted file mode 100644
index 8f0e068b7e9..00000000000
--- a/board/compulab/cl-som-imx7/Makefile
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Makefile
-#
-# (C) Copyright 2017 CompuLab, Ltd. http://www.compulab.com
-#
-# Author: Uri Mashiach <uri.mashiach at compulab.co.il>
-#
-# SPDX-License-Identifier:     GPL-2.0+
-#
-
-obj-y := mux.o common.o
-
-ifdef CONFIG_SPL_BUILD
-obj-y  += spl.o
-else
-obj-y  += cl-som-imx7.o
-endif
diff --git a/board/compulab/cl-som-imx7/cl-som-imx7.c b/board/compulab/cl-som-imx7/cl-som-imx7.c
deleted file mode 100644
index 1bc33b0a7ba..00000000000
--- a/board/compulab/cl-som-imx7/cl-som-imx7.c
+++ /dev/null
@@ -1,331 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * U-Boot board functions for CompuLab CL-SOM-iMX7 module
- *
- * (C) Copyright 2017 CompuLab, Ltd. http://www.compulab.com
- *
- * Author: Uri Mashiach <uri.mashiach at compulab.co.il>
- */
-
-#include <common.h>
-#include <environment.h>
-#include <mmc.h>
-#include <phy.h>
-#include <netdev.h>
-#include <fsl_esdhc.h>
-#include <power/pmic.h>
-#include <power/pfuze3000_pmic.h>
-#include <asm/mach-imx/mxc_i2c.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <asm/arch-mx7/mx7-pins.h>
-#include <asm/arch-mx7/sys_proto.h>
-#include <asm/arch-mx7/clock.h>
-#include "../common/eeprom.h"
-#include "common.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_SYS_I2C_MXC
-
-#define I2C_PAD_CTRL		(PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
-				PAD_CTL_HYS)
-
-#define CL_SOM_IMX7_GPIO_I2C2_SCL	IMX_GPIO_NR(1, 6)
-#define CL_SOM_IMX7_GPIO_I2C2_SDA	IMX_GPIO_NR(1, 7)
-
-static struct i2c_pads_info cl_som_imx7_i2c_pad_info2 = {
-	.scl = {
-		.i2c_mode = MX7D_PAD_GPIO1_IO06__I2C2_SCL |
-			MUX_PAD_CTRL(I2C_PAD_CTRL),
-		.gpio_mode = MX7D_PAD_GPIO1_IO06__GPIO1_IO6 |
-			MUX_PAD_CTRL(I2C_PAD_CTRL),
-		.gp = CL_SOM_IMX7_GPIO_I2C2_SCL,
-	},
-	.sda = {
-		.i2c_mode = MX7D_PAD_GPIO1_IO07__I2C2_SDA |
-			MUX_PAD_CTRL(I2C_PAD_CTRL),
-		.gpio_mode = MX7D_PAD_GPIO1_IO07__GPIO1_IO7 |
-			MUX_PAD_CTRL(I2C_PAD_CTRL),
-		.gp = CL_SOM_IMX7_GPIO_I2C2_SDA,
-	},
-};
-
-/*
- * cl_som_imx7_setup_i2c() - I2C  pinmux configuration.
- */
-static void cl_som_imx7_setup_i2c(void)
-{
-	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &cl_som_imx7_i2c_pad_info2);
-}
-#else /* !CONFIG_SYS_I2C_MXC */
-static void cl_som_imx7_setup_i2c(void) {}
-#endif /* CONFIG_SYS_I2C_MXC */
-
-int dram_init(void)
-{
-	gd->ram_size = imx_ddr_size();
-
-	return 0;
-}
-
-#ifdef CONFIG_FSL_ESDHC
-
-#define CL_SOM_IMX7_GPIO_USDHC3_PWR	IMX_GPIO_NR(6, 11)
-
-static struct fsl_esdhc_cfg cl_som_imx7_usdhc_cfg[3] = {
-	{USDHC1_BASE_ADDR, 0, 4},
-	{USDHC3_BASE_ADDR},
-};
-
-int board_mmc_init(bd_t *bis)
-{
-	int i, ret;
-	/*
-	 * According to the board_mmc_init() the following map is done:
-	 * (U-boot device node)    (Physical Port)
-	 * mmc0                    USDHC1
-	 * mmc2                    USDHC3 (eMMC)
-	 */
-	for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
-		switch (i) {
-		case 0:
-			cl_som_imx7_usdhc1_pads_set();
-			gpio_request(CL_SOM_IMX7_GPIO_USDHC1_CD, "usdhc1_cd");
-			cl_som_imx7_usdhc_cfg[0].sdhc_clk =
-				mxc_get_clock(MXC_ESDHC_CLK);
-			break;
-		case 1:
-			cl_som_imx7_usdhc3_emmc_pads_set();
-			gpio_request(CL_SOM_IMX7_GPIO_USDHC3_PWR, "usdhc3_pwr");
-			gpio_direction_output(CL_SOM_IMX7_GPIO_USDHC3_PWR, 0);
-			udelay(500);
-			gpio_direction_output(CL_SOM_IMX7_GPIO_USDHC3_PWR, 1);
-			cl_som_imx7_usdhc_cfg[1].sdhc_clk =
-				mxc_get_clock(MXC_ESDHC3_CLK);
-			break;
-		default:
-			printf("Warning: you configured more USDHC controllers "
-				"(%d) than supported by the board\n", i + 1);
-			return -EINVAL;
-		}
-
-		ret = fsl_esdhc_initialize(bis, &cl_som_imx7_usdhc_cfg[i]);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-#endif /* CONFIG_FSL_ESDHC */
-
-#ifdef CONFIG_FEC_MXC
-
-#define CL_SOM_IMX7_ETH1_PHY_NRST	IMX_GPIO_NR(1, 4)
-
-/*
- * cl_som_imx7_rgmii_rework() - Ethernet PHY configuration.
- */
-static void cl_som_imx7_rgmii_rework(struct phy_device *phydev)
-{
-	unsigned short val;
-
-	/* Ar8031 phy SmartEEE feature cause link status generates glitch,
-	 * which cause ethernet link down/up issue, so disable SmartEEE
-	 */
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x3);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x805d);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4003);
-	val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
-	val &= ~(0x1 << 8);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val);
-
-	/* To enable AR8031 ouput a 125MHz clk from CLK_25M */
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
-
-	val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
-	val &= 0xffe3;
-	val |= 0x18;
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val);
-
-	/* introduce tx clock delay */
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
-	val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
-	val |= 0x0100;
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
-}
-
-int board_phy_config(struct phy_device *phydev)
-{
-	cl_som_imx7_rgmii_rework(phydev);
-
-	if (phydev->drv->config)
-		phydev->drv->config(phydev);
-
-	return 0;
-}
-
-/*
- * cl_som_imx7_handle_mac_address() - set Ethernet MAC address environment.
- *
- * @env_var: MAC address environment variable
- * @eeprom_bus: I2C bus of the environment EEPROM
- *
- * @return: 0 on success, < 0 on failure
- */
-static int cl_som_imx7_handle_mac_address(char *env_var, uint eeprom_bus)
-{
-	int ret;
-	unsigned char enetaddr[6];
-
-	ret = eth_env_get_enetaddr(env_var, enetaddr);
-	if (ret)
-		return 0;
-
-	ret = cl_eeprom_read_mac_addr(enetaddr, eeprom_bus);
-	if (ret)
-		return ret;
-
-	ret = is_valid_ethaddr(enetaddr);
-	if (!ret)
-		return -1;
-
-	return eth_env_set_enetaddr(env_var, enetaddr);
-}
-
-#define CL_SOM_IMX7_FEC_DEV_ID_PRI 0
-
-int board_eth_init(bd_t *bis)
-{
-	/* set Ethernet MAC address environment */
-	cl_som_imx7_handle_mac_address("ethaddr", CONFIG_SYS_I2C_EEPROM_BUS);
-	/* Ethernet interface pinmux configuration  */
-	cl_som_imx7_phy1_rst_pads_set();
-	cl_som_imx7_fec1_pads_set();
-	/* PHY reset */
-	gpio_request(CL_SOM_IMX7_ETH1_PHY_NRST, "eth1_phy_nrst");
-	gpio_direction_output(CL_SOM_IMX7_ETH1_PHY_NRST, 0);
-	mdelay(10);
-	gpio_set_value(CL_SOM_IMX7_ETH1_PHY_NRST, 1);
-	/* MAC initialization */
-	return fecmxc_initialize_multi(bis, CL_SOM_IMX7_FEC_DEV_ID_PRI,
-				       CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE);
-}
-
-/*
- * cl_som_imx7_setup_fec() - Ethernet MAC 1 clock configuration.
- * - ENET1 reference clock mode select.
- * - ENET1_TX_CLK output driver is disabled when configured for ALT1.
- */
-static void cl_som_imx7_setup_fec(void)
-{
-	struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs
-		= (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
-
-	/* Use 125M anatop REF_CLK1 for ENET1, clear gpr1[13], gpr1[17]*/
-	clrsetbits_le32(&iomuxc_gpr_regs->gpr[1],
-			(IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK |
-			 IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK), 0);
-
-	set_clk_enet(ENET_125MHZ);
-}
-#else /* !CONFIG_FEC_MXC */
-static void cl_som_imx7_setup_fec(void) {}
-#endif /* CONFIG_FEC_MXC */
-
-#ifdef CONFIG_SPI
-
-static void cl_som_imx7_spi_init(void)
-{
-	cl_som_imx7_espi1_pads_set();
-}
-#else /* !CONFIG_SPI */
-static void cl_som_imx7_spi_init(void) {}
-#endif /* CONFIG_SPI */
-
-int board_early_init_f(void)
-{
-	cl_som_imx7_uart1_pads_set();
-	cl_som_imx7_usb_otg1_pads_set();
-
-	return 0;
-}
-
-int board_init(void)
-{
-	/* address of boot parameters */
-	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-	cl_som_imx7_setup_i2c();
-	cl_som_imx7_setup_fec();
-	cl_som_imx7_spi_init();
-
-	return 0;
-}
-
-#ifdef CONFIG_POWER
-#define I2C_PMIC	0
-int power_init_board(void)
-{
-	struct pmic *p;
-	int ret;
-	unsigned int reg, rev_id;
-
-	ret = power_pfuze3000_init(I2C_PMIC);
-	if (ret)
-		return ret;
-
-	p = pmic_get("PFUZE3000");
-	ret = pmic_probe(p);
-	if (ret)
-		return ret;
-
-	pmic_reg_read(p, PFUZE3000_DEVICEID, &reg);
-	pmic_reg_read(p, PFUZE3000_REVID, &rev_id);
-	printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", reg, rev_id);
-
-	/* disable Low Power Mode during standby mode */
-	pmic_reg_write(p, PFUZE3000_LDOGCTL, 0x1);
-
-	return 0;
-}
-#endif /* CONFIG_POWER */
-
-/*
- * cl_som_imx7_setup_wdog() - watchdog configuration.
- * - Output WDOG_B signal to reset external pmic.
- * - Suspend the watchdog timer during low-power modes.
- */
-void cl_som_imx7_setup_wdog(void)
-{
-	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
-
-	cl_som_imx7_wdog_pads_set();
-	set_wdog_reset(wdog);
-       /*
-	* Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),
-	* since we use PMIC_PWRON to reset the board.
-	*/
-	clrsetbits_le16(&wdog->wcr, 0, 0x10);
-}
-
-int board_late_init(void)
-{
-	env_set("board_name", "CL-SOM-iMX7");
-	cl_som_imx7_setup_wdog();
-	return 0;
-}
-
-int checkboard(void)
-{
-	char *mode;
-
-	if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
-		mode = "secure";
-	else
-		mode = "non-secure";
-
-	printf("Board: CL-SOM-iMX7 in %s mode\n", mode);
-
-	return 0;
-}
diff --git a/board/compulab/cl-som-imx7/common.c b/board/compulab/cl-som-imx7/common.c
deleted file mode 100644
index e0f90fd5c48..00000000000
--- a/board/compulab/cl-som-imx7/common.c
+++ /dev/null
@@ -1,45 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * SPL/U-Boot common functions for CompuLab CL-SOM-iMX7 module
- *
- * (C) Copyright 2017 CompuLab, Ltd. http://www.compulab.com
- *
- * Author: Uri Mashiach <uri.mashiach at compulab.co.il>
- */
-
-#include <common.h>
-#include <fsl_esdhc.h>
-#include <asm-generic/gpio.h>
-#include "common.h"
-
-#ifdef CONFIG_SPI
-
-#define CL_SOM_IMX7_GPIO_SPI_CS	IMX_GPIO_NR(4, 19)
-
-int board_spi_cs_gpio(unsigned int bus, unsigned int cs)
-{
-	return CL_SOM_IMX7_GPIO_SPI_CS;
-}
-
-#endif /* CONFIG_SPI */
-
-#ifdef CONFIG_FSL_ESDHC
-
-int board_mmc_getcd(struct mmc *mmc)
-{
-	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
-	int ret = 0;
-
-	switch (cfg->esdhc_base) {
-	case USDHC1_BASE_ADDR:
-		ret = !gpio_get_value(CL_SOM_IMX7_GPIO_USDHC1_CD);
-		break;
-	case USDHC3_BASE_ADDR:
-		ret = 1; /* Assume uSDHC3 emmc is always present */
-		break;
-	}
-
-	return ret;
-}
-
-#endif /* CONFIG_FSL_ESDHC */
diff --git a/board/compulab/cl-som-imx7/common.h b/board/compulab/cl-som-imx7/common.h
deleted file mode 100644
index 8b15a59abeb..00000000000
--- a/board/compulab/cl-som-imx7/common.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * SPL/U-Boot common header file for CompuLab CL-SOM-iMX7 module
- *
- * (C) Copyright 2017 CompuLab, Ltd. http://www.compulab.com
- *
- * Author: Uri Mashiach <uri.mashiach at compulab.co.il>
- */
-
-#define PADS_SET_PROT(pads_array) void cl_som_imx7_##pads_array##_set(void)
-
-#ifdef CONFIG_FSL_ESDHC
-#define CL_SOM_IMX7_GPIO_USDHC1_CD	IMX_GPIO_NR(5, 0)
-PADS_SET_PROT(usdhc1_pads);
-#endif /* CONFIG_FSL_ESDHC */
-PADS_SET_PROT(uart1_pads);
-#ifdef CONFIG_SPI
-PADS_SET_PROT(espi1_pads);
-#endif /* CONFIG_SPI */
-
-#ifndef CONFIG_SPL_BUILD
-#ifdef CONFIG_FSL_ESDHC
-PADS_SET_PROT(usdhc3_emmc_pads);
-#endif /* CONFIG_FSL_ESDHC */
-#ifdef CONFIG_FEC_MXC
-PADS_SET_PROT(phy1_rst_pads);
-PADS_SET_PROT(fec1_pads);
-#endif /* CONFIG_FEC_MXC */
-PADS_SET_PROT(usb_otg1_pads);
-PADS_SET_PROT(wdog_pads);
-#endif /* !CONFIG_SPL_BUILD */
diff --git a/board/compulab/cl-som-imx7/mux.c b/board/compulab/cl-som-imx7/mux.c
deleted file mode 100644
index e29d2deaf2b..00000000000
--- a/board/compulab/cl-som-imx7/mux.c
+++ /dev/null
@@ -1,141 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * SPL/U-Boot mux functions for CompuLab CL-SOM-iMX7 module
- *
- * (C) Copyright 2017 CompuLab, Ltd. http://www.compulab.com
- *
- * Author: Uri Mashiach <uri.mashiach at compulab.co.il>
- */
-
-#include <common.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <asm/arch-mx7/mx7-pins.h>
-
-#define PADS_SET(pads_array)						       \
-void cl_som_imx7_##pads_array##_set(void)				       \
-{									       \
-	imx_iomux_v3_setup_multiple_pads(pads_array, ARRAY_SIZE(pads_array));  \
-}
-
-#ifdef CONFIG_FSL_ESDHC
-
-#define USDHC_PAD_CTRL		(PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
-				PAD_CTL_HYS | PAD_CTL_PUE | \
-				PAD_CTL_PUS_PU47KOHM)
-
-static iomux_v3_cfg_t const usdhc1_pads[] = {
-	MX7D_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX7D_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX7D_PAD_SD1_DATA0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX7D_PAD_SD1_DATA1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX7D_PAD_SD1_DATA2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX7D_PAD_SD1_DATA3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-
-	MX7D_PAD_SD1_CD_B__GPIO5_IO0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-
-PADS_SET(usdhc1_pads)
-
-#endif /* CONFIG_FSL_ESDHC */
-
-#define UART_PAD_CTRL		(PAD_CTL_DSE_3P3V_49OHM | \
-				PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS)
-
-static iomux_v3_cfg_t const uart1_pads[] = {
-	MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-	MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-PADS_SET(uart1_pads)
-
-#ifdef CONFIG_SPI
-
-#define SPI_PAD_CTRL	(PAD_CTL_HYS | PAD_CTL_SRE_SLOW | \
-			PAD_CTL_DSE_3P3V_32OHM)
-
-#define GPIO_PAD_CTRL	(PAD_CTL_PUS_PU5KOHM | PAD_CTL_PUE | \
-			PAD_CTL_SRE_SLOW)
-
-static iomux_v3_cfg_t const espi1_pads[] = {
-	MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
-	MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
-	MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
-	MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 | MUX_PAD_CTRL(GPIO_PAD_CTRL),
-};
-
-PADS_SET(espi1_pads)
-
-#endif /* CONFIG_SPI */
-
-#ifndef CONFIG_SPL_BUILD
-
-#ifdef CONFIG_FSL_ESDHC
-
-static iomux_v3_cfg_t const usdhc3_emmc_pads[] = {
-	MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX7D_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX7D_PAD_SD3_DATA0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX7D_PAD_SD3_DATA1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX7D_PAD_SD3_DATA2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX7D_PAD_SD3_DATA3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX7D_PAD_SD3_DATA4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX7D_PAD_SD3_DATA5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX7D_PAD_SD3_DATA6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX7D_PAD_SD3_DATA7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-	MX7D_PAD_SD3_STROBE__SD3_STROBE	 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-
-	MX7D_PAD_SD3_RESET_B__GPIO6_IO11 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-
-PADS_SET(usdhc3_emmc_pads)
-
-#endif /* CONFIG_FSL_ESDHC */
-
-#ifdef CONFIG_FEC_MXC
-
-#define ENET_PAD_CTRL		(PAD_CTL_PUS_PD100KOHM | PAD_CTL_DSE_3P3V_49OHM)
-#define ENET_PAD_CTRL_MII	(PAD_CTL_PUS_PU5KOHM)
-
-static iomux_v3_cfg_t const phy1_rst_pads[] = {
-	/* PHY1 RST */
-	MX7D_PAD_GPIO1_IO04__GPIO1_IO4	| MUX_PAD_CTRL(GPIO_PAD_CTRL),
-};
-
-PADS_SET(phy1_rst_pads)
-
-static iomux_v3_cfg_t const fec1_pads[] = {
-	MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL |
-	MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL |
-	MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
-	MX7D_PAD_SD2_CD_B__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL_MII),
-	MX7D_PAD_SD2_WP__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL_MII),
-};
-
-PADS_SET(fec1_pads)
-
-#endif /* CONFIG_FEC_MXC */
-
-static iomux_v3_cfg_t const usb_otg1_pads[] = {
-	MX7D_PAD_GPIO1_IO05__USB_OTG1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-PADS_SET(usb_otg1_pads)
-
-static iomux_v3_cfg_t const wdog_pads[] = {
-	MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-PADS_SET(wdog_pads)
-
-#endif /* !CONFIG_SPL_BUILD */
diff --git a/board/compulab/cl-som-imx7/spl.c b/board/compulab/cl-som-imx7/spl.c
deleted file mode 100644
index 76a4c8beb02..00000000000
--- a/board/compulab/cl-som-imx7/spl.c
+++ /dev/null
@@ -1,210 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * SPL board functions for CompuLab CL-SOM-iMX7 module
- *
- * (C) Copyright 2017 CompuLab, Ltd. http://www.compulab.com
- *
- * Author: Uri Mashiach <uri.mashiach at compulab.co.il>
- */
-
-#include <common.h>
-#include <spl.h>
-#include <fsl_esdhc.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <asm/arch-mx7/mx7-pins.h>
-#include <asm/arch-mx7/clock.h>
-#include <asm/arch-mx7/mx7-ddr.h>
-#include "common.h"
-
-#ifdef CONFIG_FSL_ESDHC
-
-static struct fsl_esdhc_cfg cl_som_imx7_spl_usdhc_cfg = {
-	USDHC1_BASE_ADDR, 0, 4};
-
-int board_mmc_init(bd_t *bis)
-{
-	cl_som_imx7_usdhc1_pads_set();
-	cl_som_imx7_spl_usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
-	return fsl_esdhc_initialize(bis, &cl_som_imx7_spl_usdhc_cfg);
-}
-#endif /* CONFIG_FSL_ESDHC */
-
-static iomux_v3_cfg_t const led_pads[] = {
-	MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14 | MUX_PAD_CTRL(PAD_CTL_PUS_PU5KOHM |
-		PAD_CTL_PUE | PAD_CTL_SRE_SLOW)
-};
-
-static struct ddrc cl_som_imx7_spl_ddrc_regs_val = {
-	.init1		= 0x00690000,
-	.init0		= 0x00020083,
-	.init3		= 0x09300004,
-	.init4		= 0x04080000,
-	.init5		= 0x00100004,
-	.rankctl	= 0x0000033F,
-	.dramtmg1	= 0x0007020E,
-	.dramtmg2	= 0x03040407,
-	.dramtmg3	= 0x00002006,
-	.dramtmg4	= 0x04020305,
-	.dramtmg5	= 0x03030202,
-	.dramtmg8	= 0x00000803,
-	.zqctl0		= 0x00810021,
-	.dfitmg0	= 0x02098204,
-	.dfitmg1	= 0x00030303,
-	.dfiupd0	= 0x80400003,
-	.dfiupd1	= 0x00100020,
-	.dfiupd2	= 0x80100004,
-	.addrmap4	= 0x00000F0F,
-	.odtcfg		= 0x06000604,
-	.odtmap		= 0x00000001,
-};
-
-static struct ddrc_mp cl_som_imx7_spl_ddrc_mp_val = {
-	.pctrl_0	= 0x00000001,
-};
-
-static struct ddr_phy cl_som_imx7_spl_ddr_phy_regs_val = {
-	.phy_con0	= 0x17420F40,
-	.phy_con1	= 0x10210100,
-	.phy_con4	= 0x00060807,
-	.mdll_con0	= 0x1010007E,
-	.drvds_con0	= 0x00000D6E,
-	.cmd_sdll_con0	= 0x00000010,
-	.offset_lp_con0	= 0x0000000F,
-};
-
-struct mx7_calibration cl_som_imx7_spl_calib_param = {
-	.num_val	= 5,
-	.values		= {
-		0x0E407304,
-		0x0E447304,
-		0x0E447306,
-		0x0E447304,
-		0x0E407304,
-	},
-};
-
-static void cl_som_imx7_spl_dram_cfg_size(u32 ram_size)
-{
-	switch (ram_size) {
-	case SZ_256M:
-		cl_som_imx7_spl_ddrc_regs_val.mstr		= 0x01041001;
-		cl_som_imx7_spl_ddrc_regs_val.rfshtmg		= 0x00400046;
-		cl_som_imx7_spl_ddrc_regs_val.dramtmg0		= 0x090E1109;
-		cl_som_imx7_spl_ddrc_regs_val.addrmap0		= 0x00000014;
-		cl_som_imx7_spl_ddrc_regs_val.addrmap1		= 0x00151515;
-		cl_som_imx7_spl_ddrc_regs_val.addrmap5		= 0x03030303;
-		cl_som_imx7_spl_ddrc_regs_val.addrmap6		= 0x0F0F0303;
-		cl_som_imx7_spl_ddr_phy_regs_val.offset_rd_con0	= 0x0C0C0C0C;
-		cl_som_imx7_spl_ddr_phy_regs_val.offset_wr_con0	= 0x04040404;
-		break;
-	case SZ_512M:
-		cl_som_imx7_spl_ddrc_regs_val.mstr		= 0x01040001;
-		cl_som_imx7_spl_ddrc_regs_val.rfshtmg		= 0x00400046;
-		cl_som_imx7_spl_ddrc_regs_val.dramtmg0		= 0x090E1109;
-		cl_som_imx7_spl_ddrc_regs_val.addrmap0		= 0x00000015;
-		cl_som_imx7_spl_ddrc_regs_val.addrmap1		= 0x00161616;
-		cl_som_imx7_spl_ddrc_regs_val.addrmap5		= 0x04040404;
-		cl_som_imx7_spl_ddrc_regs_val.addrmap6		= 0x0F0F0404;
-		cl_som_imx7_spl_ddr_phy_regs_val.offset_rd_con0	= 0x0C0C0C0C;
-		cl_som_imx7_spl_ddr_phy_regs_val.offset_wr_con0	= 0x04040404;
-		break;
-	case SZ_1G:
-		cl_som_imx7_spl_ddrc_regs_val.mstr		= 0x01040001;
-		cl_som_imx7_spl_ddrc_regs_val.rfshtmg		= 0x00400046;
-		cl_som_imx7_spl_ddrc_regs_val.dramtmg0		= 0x090E1109;
-		cl_som_imx7_spl_ddrc_regs_val.addrmap0		= 0x00000016;
-		cl_som_imx7_spl_ddrc_regs_val.addrmap1		= 0x00171717;
-		cl_som_imx7_spl_ddrc_regs_val.addrmap5		= 0x04040404;
-		cl_som_imx7_spl_ddrc_regs_val.addrmap6		= 0x0F040404;
-		cl_som_imx7_spl_ddr_phy_regs_val.offset_rd_con0	= 0x0A0A0A0A;
-		cl_som_imx7_spl_ddr_phy_regs_val.offset_wr_con0	= 0x02020202;
-		break;
-	case SZ_2G:
-		cl_som_imx7_spl_ddrc_regs_val.mstr		= 0x01040001;
-		cl_som_imx7_spl_ddrc_regs_val.rfshtmg		= 0x0040005E;
-		cl_som_imx7_spl_ddrc_regs_val.dramtmg0		= 0x090E110A;
-		cl_som_imx7_spl_ddrc_regs_val.addrmap0		= 0x00000018;
-		cl_som_imx7_spl_ddrc_regs_val.addrmap1		= 0x00181818;
-		cl_som_imx7_spl_ddrc_regs_val.addrmap5		= 0x04040404;
-		cl_som_imx7_spl_ddrc_regs_val.addrmap6		= 0x04040404;
-		cl_som_imx7_spl_ddr_phy_regs_val.offset_rd_con0	= 0x0A0A0A0A;
-		cl_som_imx7_spl_ddr_phy_regs_val.offset_wr_con0	= 0x04040404;
-		break;
-	}
-
-	mx7_dram_cfg(&cl_som_imx7_spl_ddrc_regs_val,
-		     &cl_som_imx7_spl_ddrc_mp_val,
-		     &cl_som_imx7_spl_ddr_phy_regs_val,
-		     &cl_som_imx7_spl_calib_param);
-}
-
-static void cl_som_imx7_spl_dram_cfg(void)
-{
-	ulong ram_size_test, ram_size = 0;
-
-	for (ram_size = SZ_2G; ram_size >= SZ_256M; ram_size >>= 1) {
-		cl_som_imx7_spl_dram_cfg_size(ram_size);
-		ram_size_test = get_ram_size((long int *)PHYS_SDRAM, ram_size);
-		if (ram_size_test == ram_size)
-			break;
-	}
-
-	if (ram_size < SZ_256M) {
-		puts("!!!ERROR!!! DRAM detection failed!!!\n");
-		hang();
-	}
-}
-
-#ifdef CONFIG_SPL_SPI_SUPPORT
-
-static void cl_som_imx7_spl_spi_init(void)
-{
-	cl_som_imx7_espi1_pads_set();
-}
-#else /* !CONFIG_SPL_SPI_SUPPORT */
-static void cl_som_imx7_spl_spi_init(void) {}
-#endif /* CONFIG_SPL_SPI_SUPPORT */
-
-void board_init_f(ulong dummy)
-{
-	imx_iomux_v3_setup_multiple_pads(led_pads, 1);
-	/* setup AIPS and disable watchdog */
-	arch_cpu_init();
-	/* setup GP timer */
-	timer_init();
-	cl_som_imx7_spl_spi_init();
-	cl_som_imx7_uart1_pads_set();
-	/* UART clocks enabled and gd valid - init serial console */
-	preloader_console_init();
-	/* DRAM detection  */
-	cl_som_imx7_spl_dram_cfg();
-	/* Clear the BSS. */
-	memset(__bss_start, 0, __bss_end - __bss_start);
-	/* load/boot image from boot device */
-	board_init_r(NULL, 0);
-}
-
-void spl_board_init(void)
-{
-	u32 boot_device = spl_boot_device();
-
-	if (boot_device == BOOT_DEVICE_SPI)
-		puts("Booting from SPI flash\n");
-	else if (boot_device == BOOT_DEVICE_MMC1)
-		puts("Booting from SD card\n");
-	else
-		puts("Unknown boot device\n");
-}
-
-void board_boot_order(u32 *spl_boot_list)
-{
-	spl_boot_list[0] = spl_boot_device();
-	switch (spl_boot_list[0]) {
-	case BOOT_DEVICE_SPI:
-		spl_boot_list[1] = BOOT_DEVICE_MMC1;
-		break;
-	case BOOT_DEVICE_MMC1:
-		spl_boot_list[1] = BOOT_DEVICE_SPI;
-		break;
-	}
-}
diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig
deleted file mode 100644
index 0eed5264f2a..00000000000
--- a/configs/cl-som-imx7_defconfig
+++ /dev/null
@@ -1,67 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX7=y
-CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_CL_SOM_IMX7=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
-CONFIG_IMX_RDC=y
-CONFIG_IMX_BOOTAUX=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
-CONFIG_SPI_BOOT=y
-CONFIG_BOOTDELAY=3
-CONFIG_SPL_BOARD_INIT=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="CL-SOM-iMX7 # "
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EXPORTENV is not set
-# CONFIG_CMD_IMPORTENV is not set
-CONFIG_CMD_GREPENV=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-# CONFIG_ENV_IS_IN_MMC is not set
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_FSL_ESDHC=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_MXC_USB_OTG_HACTIVE=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_CI_UDC=y
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h
deleted file mode 100644
index f84a11215e4..00000000000
--- a/include/configs/cl-som-imx7.h
+++ /dev/null
@@ -1,182 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2015 CompuLab, Ltd.
- *
- * Configuration settings for the CompuLab CL-SOM-iMX7 System-on-Module.
- */
-
-#ifndef __CL_SOM_IMX7_CONFIG_H
-#define __CL_SOM_IMX7_CONFIG_H
-
-#include "mx7_common.h"
-
-#define CONFIG_MXC_UART_BASE            UART1_IPS_BASE_ADDR
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		(32 * SZ_1M)
-
-#define CONFIG_BOARD_LATE_INIT
-
-/* Uncomment to enable secure boot support */
-/* #define CONFIG_SECURE_BOOT */
-#define CONFIG_CSF_SIZE			0x4000
-
-/* Network */
-#define CONFIG_FEC_MXC
-#define CONFIG_FEC_XCV_TYPE             RGMII
-#define CONFIG_ETHPRIME                 "FEC"
-#define CONFIG_FEC_MXC_PHYADDR          0
-
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_ATHEROS
-/* ENET1 */
-#define IMX_FEC_BASE			ENET_IPS_BASE_ADDR
-
-/* PMIC */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
-#define CONFIG_POWER_PFUZE3000
-#define CONFIG_POWER_PFUZE3000_I2C_ADDR	0x08
-
-#undef CONFIG_BOOTM_NETBSD
-#undef CONFIG_BOOTM_PLAN9
-#undef CONFIG_BOOTM_RTEMS
-
-/* I2C configs */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C2		/* Enable I2C bus 2 */
-#define CONFIG_SYS_I2C_SPEED		100000
-#define SYS_I2C_BUS_SOM			0
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
-#define CONFIG_SYS_I2C_EEPROM_BUS	SYS_I2C_BUS_SOM
-
-#define CONFIG_PCA953X
-#define CONFIG_CMD_PCA953X
-#define CONFIG_SYS_I2C_PCA953X_ADDR	0x20
-#define CONFIG_SYS_I2C_PCA953X_WIDTH	{ {0x20, 16} }
-
-#undef CONFIG_SYS_AUTOLOAD
-#undef CONFIG_EXTRA_ENV_SETTINGS
-#undef CONFIG_BOOTCOMMAND
-
-#define CONFIG_SYS_AUTOLOAD		"no"
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"autoload=off\0" \
-	"script=boot.scr\0" \
-	"loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0" \
-	"loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0" \
-	"loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${fdtfile};\0" \
-	"bootscript=echo Running bootscript from ${storagetype} ...; source ${loadaddr};\0" \
-	"storagebootcmd=echo Booting from ${storagetype} ...; run ${storagetype}args; run doboot;\0" \
-	"kernel=zImage\0" \
-	"console=ttymxc0\0" \
-	"fdt_high=0xffffffff\0" \
-	"initrd_high=0xffffffff\0" \
-	"fdtfile=imx7d-sbc-imx7.dtb\0" \
-	"fdtaddr=0x83000000\0" \
-	"mmcdev_def="__stringify(CONFIG_SYS_MMC_DEV)"\0" \
-	"usbdev_def="__stringify(CONFIG_SYS_USB_DEV)"\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
-	"usbpart=" __stringify(CONFIG_SYS_USB_IMG_LOAD_PART) "\0" \
-	"doboot=bootz ${loadaddr} - ${fdtaddr}\0" \
-	"mmc_config=mmc dev ${mmcdev}; mmc rescan\0" \
-	"mmcargs=setenv bootargs console=${console},${baudrate} " \
-		"root=/dev/mmcblk${mmcblk}p2 rootwait rw\0" \
-	"mmcbootscript=" \
-		"if run mmc_config; then " \
-			"setenv storagetype mmc;" \
-			"setenv storagedev ${mmcdev}:${mmcpart};" \
-			"if run loadscript; then " \
-				"run bootscript; " \
-			"fi; " \
-		"fi;\0" \
-	"mmcboot=" \
-		"if run mmc_config; then " \
-			"setenv storagetype mmc;" \
-			"setenv storagedev ${mmcdev}:${mmcpart};" \
-			"if run loadkernel; then " \
-				"if run loadfdt; then " \
-					"run storagebootcmd;" \
-				"fi; " \
-			"fi; " \
-		"fi;\0" \
-	"sdbootscript=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; " \
-		"run mmcbootscript\0" \
-	"usbbootscript=setenv usbdev ${usbdev_def}; " \
-		"setenv storagetype usb;" \
-		"setenv storagedev ${usbdev}:${usbpart};" \
-		"if run loadscript; then " \
-			"run bootscript; " \
-		"fi; " \
-	"sdboot=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; run mmcboot\0" \
-	"emmcbootscript=setenv mmcdev 1; setenv mmcblk 2; run mmcbootscript\0" \
-	"emmcboot=setenv mmcdev 1; setenv mmcblk 2; run mmcboot\0" \
-
-#define CONFIG_BOOTCOMMAND \
-	"echo SD boot attempt ...; run sdbootscript; run sdboot; " \
-	"echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; " \
-	"echo USB boot attempt ...; run usbbootscript; "
-
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x20000000)
-
-#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
-#define CONFIG_SYS_HZ			1000
-
-/* Physical Memory Map */
-#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
-
-#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
-#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
-	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-/* SPI Flash support */
-#define CONFIG_SF_DEFAULT_BUS		0
-#define CONFIG_SF_DEFAULT_CS		0
-#define CONFIG_SF_DEFAULT_SPEED		20000000
-#define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)
-
-/* FLASH and environment organization */
-#define CONFIG_ENV_SIZE			SZ_8K
-#define CONFIG_ENV_OFFSET		(768 * 1024)
-#define CONFIG_ENV_SECT_SIZE		(64 * 1024)
-#define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
-
-/* MMC Config*/
-#define CONFIG_FSL_USDHC
-#ifdef CONFIG_FSL_USDHC
-#define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC1_BASE_ADDR
-
-#define CONFIG_SYS_FSL_USDHC_NUM	2
-#define CONFIG_MMCROOT			"/dev/mmcblk0p2" /* USDHC1 */
-#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
-#endif
-
-/* USB Configs */
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CONFIG_MXC_USB_FLAGS   0
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-
-/* Uncomment to enable iMX thermal driver support */
-/*#define CONFIG_IMX_THERMAL*/
-
-/* SPL */
-#include "imx7_spl.h"
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
-#endif /* CONFIG_SPL_BUILD */
-
-#endif	/* __CONFIG_H */
-- 
2.19.1.1215.g8438c0b245-goog



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