[U-Boot] [PATCH v3 2/4] rockchip: rk3399: Add common Rock960 family from Vamrs
Peter Robinson
pbrobinson at gmail.com
Wed Oct 3 19:04:00 UTC 2018
On Thu, Sep 27, 2018 at 8:03 PM Manivannan Sadhasivam
<manivannan.sadhasivam at linaro.org> wrote:
>
> Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs.
> It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition)
> 96Boards.
>
> Below are some of the key differences between both Rock960 and Ficus
> boards:
>
> 1. Different host enable GPIO for USB
> 2. Different power and reset GPIO for PCI-E
> 3. No Ethernet port on Rock960
>
> The common board support will be utilized by both boards. The device
> tree has been organized in such a way that only the properties which
> differ between both boards are placed in the board specific dts and
> the reset of the nodes are placed in common dtsi file.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
> [Added instructions for SD card boot]
> Signed-off-by: Ezequiel Garcia <ezequiel at collabora.com>
Tested-by: Peter Robinson <pbrobinson at gmail.com>
Tested on a Rock960.
> ---
>
> Changes in v3: Added instruction for copying prebuilt bl31.elf for SPL
>
> Changes in v2: None
>
> arch/arm/dts/rk3399-rock960.dtsi | 506 ++++++++++++++++++++
> arch/arm/mach-rockchip/rk3399/Kconfig | 26 +
> board/vamrs/rock960_rk3399/Kconfig | 15 +
> board/vamrs/rock960_rk3399/MAINTAINERS | 6 +
> board/vamrs/rock960_rk3399/Makefile | 6 +
> board/vamrs/rock960_rk3399/README | 152 ++++++
> board/vamrs/rock960_rk3399/rock960-rk3399.c | 50 ++
> include/configs/rock960_rk3399.h | 15 +
> 8 files changed, 776 insertions(+)
> create mode 100644 arch/arm/dts/rk3399-rock960.dtsi
> create mode 100644 board/vamrs/rock960_rk3399/Kconfig
> create mode 100644 board/vamrs/rock960_rk3399/MAINTAINERS
> create mode 100644 board/vamrs/rock960_rk3399/Makefile
> create mode 100644 board/vamrs/rock960_rk3399/README
> create mode 100644 board/vamrs/rock960_rk3399/rock960-rk3399.c
> create mode 100644 include/configs/rock960_rk3399.h
>
> diff --git a/arch/arm/dts/rk3399-rock960.dtsi b/arch/arm/dts/rk3399-rock960.dtsi
> new file mode 100644
> index 00000000000..51644d6d02d
> --- /dev/null
> +++ b/arch/arm/dts/rk3399-rock960.dtsi
> @@ -0,0 +1,506 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (c) 2018 Linaro Ltd.
> + */
> +
> +#include <dt-bindings/pwm/pwm.h>
> +#include <dt-bindings/pinctrl/rockchip.h>
> +#include "rk3399.dtsi"
> +
> +/ {
> + vcc1v8_s0: vcc1v8-s0 {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc1v8_s0";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + };
> +
> + vcc_sys: vcc-sys {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_sys";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-always-on;
> + };
> +
> + vcc3v3_sys: vcc3v3-sys {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3_sys";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + vin-supply = <&vcc_sys>;
> + };
> +
> + vcc3v3_pcie: vcc3v3-pcie-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie_drv>;
> + regulator-boot-on;
> + regulator-name = "vcc3v3_pcie";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc3v3_sys>;
> + };
> +
> + vcc5v0_host: vcc5v0-host-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + pinctrl-names = "default";
> + pinctrl-0 = <&host_vbus_drv>;
> + regulator-name = "vcc5v0_host";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-always-on;
> + vin-supply = <&vcc_sys>;
> + };
> +
> + vdd_log: vdd-log {
> + compatible = "pwm-regulator";
> + pwms = <&pwm2 0 25000 0>;
> + regulator-name = "vdd_log";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1400000>;
> + regulator-always-on;
> + regulator-boot-on;
> + vin-supply = <&vcc_sys>;
> + };
> +
> +};
> +
> +&cpu_l0 {
> + cpu-supply = <&vdd_cpu_l>;
> +};
> +
> +&cpu_l1 {
> + cpu-supply = <&vdd_cpu_l>;
> +};
> +
> +&cpu_l2 {
> + cpu-supply = <&vdd_cpu_l>;
> +};
> +
> +&cpu_l3 {
> + cpu-supply = <&vdd_cpu_l>;
> +};
> +
> +&cpu_b0 {
> + cpu-supply = <&vdd_cpu_b>;
> +};
> +
> +&cpu_b1 {
> + cpu-supply = <&vdd_cpu_b>;
> +};
> +
> +&emmc_phy {
> + status = "okay";
> +};
> +
> +&hdmi {
> + status = "okay";
> +};
> +
> +&i2c0 {
> + clock-frequency = <400000>;
> + i2c-scl-rising-time-ns = <168>;
> + i2c-scl-falling-time-ns = <4>;
> + status = "okay";
> +
> + vdd_cpu_b: regulator at 40 {
> + compatible = "silergy,syr827";
> + reg = <0x40>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-name = "vdd_cpu_b";
> + regulator-min-microvolt = <712500>;
> + regulator-max-microvolt = <1500000>;
> + regulator-ramp-delay = <1000>;
> + regulator-always-on;
> + regulator-boot-on;
> + vin-supply = <&vcc_sys>;
> + status = "okay";
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_gpu: regulator at 41 {
> + compatible = "silergy,syr828";
> + reg = <0x41>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-name = "vdd_gpu";
> + regulator-min-microvolt = <712500>;
> + regulator-max-microvolt = <1500000>;
> + regulator-ramp-delay = <1000>;
> + regulator-always-on;
> + regulator-boot-on;
> + vin-supply = <&vcc_sys>;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + rk808: pmic at 1b {
> + compatible = "rockchip,rk808";
> + reg = <0x1b>;
> + interrupt-parent = <&gpio1>;
> + interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pmic_int_l>;
> + rockchip,system-power-controller;
> + wakeup-source;
> + #clock-cells = <1>;
> + clock-output-names = "xin32k", "rk808-clkout2";
> +
> + vcc1-supply = <&vcc_sys>;
> + vcc2-supply = <&vcc_sys>;
> + vcc3-supply = <&vcc_sys>;
> + vcc4-supply = <&vcc_sys>;
> + vcc6-supply = <&vcc_sys>;
> + vcc7-supply = <&vcc_sys>;
> + vcc8-supply = <&vcc3v3_sys>;
> + vcc9-supply = <&vcc_sys>;
> + vcc10-supply = <&vcc_sys>;
> + vcc11-supply = <&vcc_sys>;
> + vcc12-supply = <&vcc3v3_sys>;
> + vddio-supply = <&vcc_1v8>;
> +
> + regulators {
> + vdd_center: DCDC_REG1 {
> + regulator-name = "vdd_center";
> + regulator-min-microvolt = <750000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_cpu_l: DCDC_REG2 {
> + regulator-name = "vdd_cpu_l";
> + regulator-min-microvolt = <750000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc_ddr: DCDC_REG3 {
> + regulator-name = "vcc_ddr";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + vcc_1v8: DCDC_REG4 {
> + regulator-name = "vcc_1v8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vcc1v8_dvp: LDO_REG1 {
> + regulator-name = "vcc1v8_dvp";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vcca1v8_hdmi: LDO_REG2 {
> + regulator-name = "vcca1v8_hdmi";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vcca_1v8: LDO_REG3 {
> + regulator-name = "vcca_1v8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vcc_sd: LDO_REG4 {
> + regulator-name = "vcc_sd";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3300000>;
> + };
> + };
> +
> + vcc3v0_sd: LDO_REG5 {
> + regulator-name = "vcc3v0_sd";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3000000>;
> + };
> + };
> +
> + vcc_1v5: LDO_REG6 {
> + regulator-name = "vcc_1v5";
> + regulator-min-microvolt = <1500000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1500000>;
> + };
> + };
> +
> + vcca0v9_hdmi: LDO_REG7 {
> + regulator-name = "vcca0v9_hdmi";
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <900000>;
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <900000>;
> + };
> + };
> +
> + vcc_3v0: LDO_REG8 {
> + regulator-name = "vcc_3v0";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3000000>;
> + };
> + };
> +
> + vcc3v3_s3: SWITCH_REG1 {
> + regulator-name = "vcc3v3_s3";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + vcc3v3_s0: SWITCH_REG2 {
> + regulator-name = "vcc3v3_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> + };
> + };
> +};
> +
> +&i2c1 {
> + status = "okay";
> +};
> +
> +&i2c2 {
> + status = "okay";
> +};
> +
> +&i2c3 {
> + status = "okay";
> +};
> +
> +&i2c4 {
> + status = "okay";
> +};
> +
> +&io_domains {
> + bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
> + audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
> + sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
> + gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
> + status = "okay";
> +};
> +
> +&pcie_phy {
> + status = "okay";
> +};
> +
> +&pcie0 {
> + num-lanes = <4>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie_clkreqn_cpm>;
> + vpcie3v3-supply = <&vcc3v3_pcie>;
> + status = "okay";
> +};
> +
> +&pmu_io_domains {
> + pmu1830-supply = <&vcc_1v8>;
> + status = "okay";
> +};
> +
> +&pinctrl {
> + sdmmc {
> + sdmmc_bus1: sdmmc-bus1 {
> + rockchip,pins =
> + <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>;
> + };
> +
> + sdmmc_bus4: sdmmc-bus4 {
> + rockchip,pins =
> + <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>,
> + <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>,
> + <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>,
> + <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>;
> + };
> +
> + sdmmc_clk: sdmmc-clk {
> + rockchip,pins =
> + <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>;
> + };
> +
> + sdmmc_cmd: sdmmc-cmd {
> + rockchip,pins =
> + <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>;
> + };
> + };
> +
> + pmic {
> + pmic_int_l: pmic-int-l {
> + rockchip,pins =
> + <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> +
> + vsel1_gpio: vsel1-gpio {
> + rockchip,pins =
> + <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
> + };
> +
> + vsel2_gpio: vsel2-gpio {
> + rockchip,pins =
> + <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
> + };
> + };
> +};
> +
> +&pwm2 {
> + status = "okay";
> +};
> +
> +&pwm3 {
> + status = "okay";
> +};
> +
> +&sdhci {
> + bus-width = <8>;
> + mmc-hs400-1_8v;
> + mmc-hs400-enhanced-strobe;
> + non-removable;
> + status = "okay";
> +};
> +
> +&sdmmc {
> + bus-width = <4>;
> + cap-mmc-highspeed;
> + cap-sd-highspeed;
> + clock-frequency = <100000000>;
> + clock-freq-min-max = <100000 100000000>;
> + cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
> + disable-wp;
> + sd-uhs-sdr104;
> + vqmmc-supply = <&vcc_sd>;
> + card-detect-delay = <800>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
> + status = "okay";
> +};
> +
> +&uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart0_xfer &uart0_cts>;
> + status = "okay";
> +};
> +
> +&uart2 {
> + status = "okay";
> +};
> +
> +&u2phy0 {
> + status = "okay";
> +};
> +
> +&u2phy1 {
> + status = "okay";
> +};
> +
> +&u2phy0_host {
> + phy-supply = <&vcc5v0_host>;
> + status = "okay";
> +};
> +
> +&u2phy1_host {
> + phy-supply = <&vcc5v0_host>;
> + status = "okay";
> +};
> +
> +&u2phy0_otg {
> + status = "okay";
> +};
> +
> +&u2phy1_otg {
> + status = "okay";
> +};
> +
> +&usb_host0_ehci {
> + status = "okay";
> +};
> +
> +&usb_host0_ohci {
> + status = "okay";
> +};
> +
> +&usb_host1_ehci {
> + status = "okay";
> +};
> +
> +&usb_host1_ohci {
> + status = "okay";
> +};
> +
> +&vopb {
> + status = "okay";
> +};
> +
> +&vopl {
> + status = "okay";
> +};
> diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig
> index 415466a49bb..8f18e33c76f 100644
> --- a/arch/arm/mach-rockchip/rk3399/Kconfig
> +++ b/arch/arm/mach-rockchip/rk3399/Kconfig
> @@ -28,6 +28,31 @@ config TARGET_PUMA_RK3399
> * HDMI, eDP, MIPI-DSI, MIPI-DSI/CSI and MIPI-CSI
> * SPI, I2C, I2S, UART, GPIO, ...
>
> +config TARGET_ROCK960_RK3399
> + bool "Vamrs Limited Rock960 board family"
> + help
> + Support for Rock960 board family by Vamrs Limited. This board
> + family consists of Rock960 (Consumer Edition) and Ficus
> + (Enterprise Edition) 96Boards.
> +
> + Common features implemented on both boards:
> + * Rockchip RK3399 SoC (2xCortex A72, 4xCortex A53, ARM Mali T860MP4)
> + * 16/32GB eMMC, uSD slot
> + * HDMI/DP/MIPI
> + * 20-pin low speed and 40-pin high speed expanders, 6 LED, 3 buttons
> +
> + Additional features of Rock960:
> + * 2GiB/4GiB LPDDR3 RAM
> + * 1x USB 3.0 type A, 1x USB 2.0 type A (host mode only),
> + 1x USB 3.0 type C OTG
> +
> + Additional features of Ficus:
> + * 2GiB/4GiB DDR3 RAM
> + * Ethernet
> + * Dual SATA
> + * 2x USB 3.0 type A, 2x USB 2.0 type A (host mode only),
> + 1x USB 3.0 type C OTG
> +
> endchoice
>
> config SYS_SOC
> @@ -38,5 +63,6 @@ config SYS_MALLOC_F_LEN
>
> source "board/rockchip/evb_rk3399/Kconfig"
> source "board/theobroma-systems/puma_rk3399/Kconfig"
> +source "board/vamrs/rock960_rk3399/Kconfig"
>
> endif
> diff --git a/board/vamrs/rock960_rk3399/Kconfig b/board/vamrs/rock960_rk3399/Kconfig
> new file mode 100644
> index 00000000000..cacc53f3780
> --- /dev/null
> +++ b/board/vamrs/rock960_rk3399/Kconfig
> @@ -0,0 +1,15 @@
> +if TARGET_ROCK960_RK3399
> +
> +config SYS_BOARD
> + default "rock960_rk3399"
> +
> +config SYS_VENDOR
> + default "vamrs"
> +
> +config SYS_CONFIG_NAME
> + default "rock960_rk3399"
> +
> +config BOARD_SPECIFIC_OPTIONS # dummy
> + def_bool y
> +
> +endif
> diff --git a/board/vamrs/rock960_rk3399/MAINTAINERS b/board/vamrs/rock960_rk3399/MAINTAINERS
> new file mode 100644
> index 00000000000..9f3fe75f4fb
> --- /dev/null
> +++ b/board/vamrs/rock960_rk3399/MAINTAINERS
> @@ -0,0 +1,6 @@
> +ROCK960-RK3399
> +M: Manivannan Sadhasivam manivannan.sadhasivam at linaro.org
> +S: Maintained
> +F: board/rockchip/rock960_rk3399
> +F: include/configs/rock960_rk3399.h
> +F: configs/rock960-rk3399_defconfig
> diff --git a/board/vamrs/rock960_rk3399/Makefile b/board/vamrs/rock960_rk3399/Makefile
> new file mode 100644
> index 00000000000..6c3e475b3a8
> --- /dev/null
> +++ b/board/vamrs/rock960_rk3399/Makefile
> @@ -0,0 +1,6 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
> +#
> +
> +obj-y += rock960-rk3399.o
> diff --git a/board/vamrs/rock960_rk3399/README b/board/vamrs/rock960_rk3399/README
> new file mode 100644
> index 00000000000..d14399090e2
> --- /dev/null
> +++ b/board/vamrs/rock960_rk3399/README
> @@ -0,0 +1,152 @@
> +Contents
> +========
> +
> +1. Introduction
> +2. Get the Source and prebuild binary
> +3. Compile the U-Boot
> +4. Compile the rkdeveloptool
> +5. Package the image
> + 5.1. Package the image for U-Boot SPL(option 1)
> + 5.2. Package the image for Rockchip miniloader(option 2)
> +6. Bootloader storage options
> +7. Flash the image to eMMC
> + 7.1. Flash the image with U-Boot SPL(option 1)
> + 7.2. Flash the image with Rockchip miniloader(option 2)
> +8. Create a bootable SD/MMC
> +9. And that is it
> +
> +Introduction
> +============
> +
> +Rock960 board family consists of Rock960 (Consumer Edition) and
> +Ficus (Enterprise Edition) 96Boards featuring Rockchip RK3399 SoC.
> +
> +Common features implemented on both boards:
> + * CPU: ARMv8 64bit Big-Little architecture,
> + * Big: dual-core Cortex-A72
> + * Little: quad-core Cortex-A53
> + * IRAM: 200KB
> + * eMMC: 16/32GB eMMC 5.1
> + * PMU: RK808
> + * SD/MMC
> + * Display: HDMI/DP/MIPI
> + * Low Speed Expansion Connector
> + * High Speed Expansion Connector
> +
> +Additional features of Rock960:
> + * DRAM: 2GB/4GB LPDDR3 @ 1866MHz
> + * 1x USB 3.0 type A, 1x USB 2.0 type A (host mode only),
> + 1x USB 3.0 type C OTG
> +
> +Additional features of Ficus:
> + * DRAM: 2GB/4GB DDR3 @ 1600MHz
> + * Ethernet
> + * 2x USB 3.0 type A, 2x USB 2.0 type A (host mode only),
> + 1x USB 3.0 type C OTG
> +
> +Here is the step-by-step to boot to U-Boot on Rock960 boards.
> +
> +Get the Source and prebuild binary
> +==================================
> +
> + > git clone https://github.com/96rocks/rkbin.git
> + > git clone https://github.com/rockchip-linux/rkdeveloptool.git
> +
> +Compile the U-Boot
> +==================
> +
> + > cd ../u-boot
> + > cp ../rkbin/rk33/rk3399_bl31_v1.00.elf ./bl31.elf
> + > export ARCH=arm64
> + > export CROSS_COMPILE=aarch64-linux-gnu-
> + > make rock960-rk3399_defconfig
> + > make
> + > make u-boot.itb
> +
> +Compile the rkdeveloptool
> +=========================
> +
> +Follow instructions in latest README
> + > cd ../rkdeveloptool
> + > autoreconf -i
> + > ./configure
> + > make
> + > sudo make install
> +
> +Package the image
> +=================
> +
> +Package the image for U-Boot SPL(option 1)
> +--------------------------------
> + > cd ..
> + > tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin idbspl.img
> +
> + Get idbspl.img in this step.
> +
> +Package the image for Rockchip miniloader(option 2)
> +------------------------------------------
> + > cd ../rkbin
> + > ./tools/loaderimage --pack --uboot u-boot/u-boot-dtb.bin uboot.img 0x200000
> +
> + > ../u-boot/tools/mkimage -n rk3399 -T rksd -d rk3399_ddr_933MHz_v1.08.bin idbloader.img
> + > cat ./rk33/rk3399_miniloader_v1.06.bin >> idbloader.img
> +
> + Get uboot.img and idbloader.img in this step.
> +
> +Bootloader storage options
> +==========================
> +
> +There are a few different storage options for the bootloader.
> +This document explores two of these: eMMC and removable SD/MMC.
> +
> +Flash the image to eMMC
> +=======================
> +
> +Flash the image with U-Boot SPL(option 1)
> +-------------------------------
> +Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
> + > rkdeveloptool db rkbin/rk33/rk3399_loader_v1.08.106.bin
> + > rkdeveloptool wl 64 u-boot/idbspl.img
> + > rkdeveloptool wl 0x4000 u-boot/u-boot.itb
> + > rkdeveloptool rd
> +
> +Flash the image with Rockchip miniloader(option 2)
> +----------------------------------------
> +Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
> + > rkdeveloptool db rkbin/rk33/rk3399_loader_v1.08.106.bin
> + > rkdeveloptool wl 0x40 idbloader.img
> + > rkdeveloptool wl 0x4000 uboot.img
> + > rkdeveloptool wl 0x6000 ./img/rk3399/trust.img
> + > rkdeveloptool rd
> +
> +Create a bootable SD/MMC
> +========================
> +
> +The idbspl.img contains the first stage, and the u-boot.img the second stage.
> +As explained in the Rockchip partition table reference [1], the first stage
> +(aka loader1) start sector is 64, and the second stage start sector is 16384.
> +
> +Each sector is 512 bytes, which means the first stage offset is 32 KiB,
> +and the second stage offset is 8 MiB.
> +
> +Note: the second stage location is actually not as per the spec,
> +but defined by the SPL. Mainline SPL defines an 8 MiB offset for the second
> +stage.
> +
> +Assuming the SD card is exposed by device /dev/mmcblk0, the commands
> +to write the two stages are:
> +
> + > dd if=idbspl.img of=/dev/mmcblk0 bs=1k seek=32
> + > dd if=u-boot.itb of=/dev/mmcblk0 bs=1k seek=8192
> +
> +Setting up the kernel and rootfs is beyond the scope of this document.
> +
> +And that is it
> +==============
> +
> +You should be able to get U-Boot log in console/UART2(baurdrate 1500000)
> +
> +For more detail, please reference [2].
> +
> +[1] http://opensource.rock-chips.com/wiki_Partitions
> +[2] http://opensource.rock-chips.com/wiki_Boot_option
> diff --git a/board/vamrs/rock960_rk3399/rock960-rk3399.c b/board/vamrs/rock960_rk3399/rock960-rk3399.c
> new file mode 100644
> index 00000000000..d3775b22191
> --- /dev/null
> +++ b/board/vamrs/rock960_rk3399/rock960-rk3399.c
> @@ -0,0 +1,50 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <dm/pinctrl.h>
> +#include <dm/uclass-internal.h>
> +#include <asm/arch/periph.h>
> +#include <power/regulator.h>
> +#include <spl.h>
> +
> +int board_init(void)
> +{
> + int ret;
> +
> + ret = regulators_enable_boot_on(false);
> + if (ret)
> + debug("%s: Cannot enable boot on regulator\n", __func__);
> +
> + return 0;
> +}
> +
> +void spl_board_init(void)
> +{
> + struct udevice *pinctrl;
> + int ret;
> +
> + ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
> + if (ret) {
> + debug("%s: Cannot find pinctrl device\n", __func__);
> + goto err;
> + }
> +
> + /* Enable debug UART */
> + ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
> + if (ret) {
> + debug("%s: Failed to set up console UART\n", __func__);
> + goto err;
> + }
> +
> + preloader_console_init();
> + return;
> +err:
> + printf("%s: Error %d\n", __func__, ret);
> +
> + /* No way to report error here */
> + hang();
> +}
> diff --git a/include/configs/rock960_rk3399.h b/include/configs/rock960_rk3399.h
> new file mode 100644
> index 00000000000..746d24cbff5
> --- /dev/null
> +++ b/include/configs/rock960_rk3399.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam at linaro.org>
> + */
> +
> +#ifndef __ROCK960_RK3399_H
> +#define __ROCK960_RK3399_H
> +
> +#include <configs/rk3399_common.h>
> +
> +#define CONFIG_SYS_MMC_ENV_DEV 1
> +
> +#define SDRAM_BANK_SIZE (2UL << 30)
> +
> +#endif
> --
> 2.17.1
>
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